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Design and realization of 1024-point high-speed FFT processor based on FPGA / 国际生物医学工程杂志
International Journal of Biomedical Engineering ; (6): 205-208, 2011.
Article in Chinese | WPRIM | ID: wpr-421277
ABSTRACT
ObjectiveTo design a fast fourier transform (FFT) processor to meet the needs for high-speed and real-time signal processing. MethodsA 1 024-point, 32-bit, fixed, complex FFT processor was designed based on field programmable gate array (FPGA) by using radix-2 decimation in frequency(DIF) algorithm and pipeline structure in the butterfly module and ping-pong operation in data storage unit. ResultsWhen the primary clock was 100 MHz, 1 024-point FFT calculation took about 62.95us. The processor was fast enough for processing highspeed and real-time signals. ConclusionThe results provides reference value that theoretical study of the FFT algorithm can be applied in the adaptive dynamic filter of ultrasonic diagnostic system and ultrasonic doppler flow measurement system.

Full text: Available Index: WPRIM (Western Pacific) Language: Chinese Journal: International Journal of Biomedical Engineering Year: 2011 Type: Article

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Full text: Available Index: WPRIM (Western Pacific) Language: Chinese Journal: International Journal of Biomedical Engineering Year: 2011 Type: Article