Simultaneous enhancement of brightness, efficiency, and switching in RGB organic light emitting transistors.

An innovative design strategy for light emitting field effect transistors (LEFETs) to harvest higher luminance and switching is presented. The strategy uses a non-planar electrode geometry in tri-layer LEFETs for simultaneous enhancement of the key parameters of quantum efficiency, brightness, switching, and mobility across the RGB color gamut.

Field-effect transistors fabricated from diluted magnetic semiconductor colloidal nanowires.

Field-effect transistors (FETs) fabricated from undoped and Co(2+)-doped CdSe colloidal nanowires show typical n-channel transistor behaviour with gate effect. Exposed to microscope light, a 10 times current enhancement is observed in the doped nanowire-based devices due to the significant modification of the electronic structure of CdSe nanowires induced by Co(2+)-doping, which is revealed by theoretical calculations from spin-polarized plane-wave density functional theory.

Nanostructured, active organic-metal junctions for highly efficient charge generation and extraction in polymer-fullerene solar cells.

A facile one step method for periodic nanostructuring of organic solar cells is presented. The nanostructured metal-organic interface delivers combined enhanced light trapping and improved charge extraction leading to up to a 10% increase in power conversion efficiency of already optimized planar devices.

Cobalt-doped cadmium selenide colloidal nanowires.

Co(2+)-doped CdSe colloidal nanowires with tunable size and dopant concentration have been prepared by a solution-liquid-solid (SLS) approach for the first time. These doped nanowires exhibit anomalous photoluminescence temperature dependence in comparison with undoped nanowires.

Design of 10Gbps optical encoder/decoder structure for FE-OCDMA system using SOA and opto-VLSI processors.

In this paper we propose and experimentally demonstrate a reconfigurable 10Gbps frequency-encoded (1D) encoder/decoder structure for optical code division multiple access (OCDMA). The encoder is constructed using a single semiconductor optical amplifier (SOA) and 1D reflective Opto-VLSI processor. The SOA generates broadband amplified spontaneous emission that is dynamically sliced using digital phase holograms loaded onto the Opto-VLSI processor to generate 1D codewords. The selected wavelengths are injected back into the same SOA for amplifications. The decoder is constructed using single Opto-VLSI processor only. The encoded signal can successfully be retrieved at the decoder side only when the digital phase holograms of the encoder and the decoder are matched. The system performance is measured in terms of the auto-correlation and cross-correlation functions as well as the eye diagram.

Integrated 10 Gb/s AWG-based correlator for multi-wavelength optical header recognition.

In this paper we experimentally demonstrate a novel optical correlator employing dual integrated Arrayed Waveguide Grating (AWG) in conjunction with variable delay lines. The variable delay lines provide wavelength-dependent time delays and generate a wavelength profile that matches arbitrary bit patterns, whereas the AWGs are used to demultiplex and multiplex the wavelength components of the multi-wavelength header bit pattern. The recognition of 4-bit optical patterns at different wavelengths is experimentally demonstrated at 10 Gb/s by showing that the correlator produces an autocorrelation waveform of high peak whenever the input bit pattern matches the wavelengths profile, and a low-amplitude cross-correlation function otherwise.

Wavelength-encoded OCDMA system using opto-VLSI processors.

We propose and experimentally demonstrate a 2.5 Gbits/sper user wavelength-encoded optical code-division multiple-access encoder-decoder structure based on opto-VLSI processing. Each encoder and decoder is constructed using a single 1D opto-very-large-scale-integrated (VLSI) processor in conjunction with a fiber Bragg grating (FBG) array of different Bragg wavelengths. The FBG array spectrally and temporally slices the broadband input pulse into several components and the opto-VLSI processor generates codewords using digital phase holograms. System performance is measured in terms of the autocorrelation and cross-correlation functions as well as the eye diagram.

Passive and active optical bit-pattern recognition structures for multiwavelength optical packet switching networks.

Next generation High-Speed optical packet switching networks require components capable of recognising the optical header to enable on-the-fly accurate switching of incoming data packets to their destinations. This paper experimentally demonstrates a comparison between two different optical header recognition structures; A passive structure based on the use of Fiber Bragg Gratings (FBGs), whereas the active structure employs Opto-VLSI processors that synthesise dynamic wavelength profile through digital phase holograms. The structures are experimentally demonstrated at 10Gbps. Performance comparison between the two structures is also discussed. These optical header recognition structures are attractive for multiwavelength optical network and applications.

Experimental demonstration of a tunable laser using an SOA and an Opto-VLSI Processor.

In this paper we propose and experimentally demonstrate a tunable laser structure cascading a semiconductor optical amplifier (SOA) that generates broadband amplified spontaneous emission and a reflective Opto-VLSI processor that dynamically reflects arbitrarily wavelengths and injects them back into the SOA, thus synthesizing an output signal of variable wavelength. The wavelength tunablility is performed using digital phase holograms uploaded on the Opto-VLSI processor. Experimental results demonstrate a tuning range from 1524nm to 1534nm, and show that the proposed tunable laser structure has a stable performance.

High-speed (2.5 Gbps) reconfigurable inter-chip optical interconnects using opto-VLSI processors.

Reconfigurablele optical interconnects enable flexible and high-performance communication in multi-chip architectures to be arbitrarily adapted, leading to efficient parallel signal processing. The use of Opto-VLSI processors as beam steerers and multicasters for reconfigurable inter-chip optical interconnection is discussed. We demonstrate, as proof-of-concept, 2.5 Gbps reconfigurable optical interconnects between an 850nm vertical cavity surface emitting lasers (VCSEL) array and a photodiode (PD) array integrated onto a PCB by driving two Opto-VLSI processors with steering and multicasting digital phase holograms. The architecture is experimentally demonstrated through three scenarios showing its flexibility to perform single, multicasting, and parallel reconfigurable optical interconnects. To our knowledge, this is the first reported high-speed reconfigurable N-to-N optical interconnects architecture, which will have a significant impact on the flexibility and efficiency of large shared-memory multiprocessor machines.