Effect of Trap Behavior on the Reliability Instability of Metamorphic Buffer in InAlAs/InGaAs MHEMT on GaAs.

Our investigation focused on assessing the influence of the metamorphic buffer in metamorphic high-electron-mobility transistors (MHEMT) that were grown on GaAs substrates. While an MHEMT exhibited elevated off-state current levels, its direct current (DC) and radio frequency (RF) traits were found to be comparable to those of InP-based lattice-matched high-electron-mobility transistors (LM-HEMTs). However, the Pulsed I-V measurement results confirmed the presence of the fast transient charging effect, leading to a more substantial degradation in drain current observed in MHEMT. In addition, through the low-frequency noise characteristics, it was confirmed that the dominant trapping location was located in the bulk site. The slope of the 1/f noise measurement indicated that the primary trapping site was in proximity to the bulk traps. The carrier-number-fluctuation (CNF) model was employed to extract the bulk trap density (Nt). For the LM-HEMTs, the value was at 3.27 × 1016 eV-1·cm-3, while for the MHEMT, it was 3.56 × 1017 eV-1·cm-3.

Impact of Charge-Trapping Effects on Reliability Instability in AlxGa1-xN/GaN High-Electron-Mobility Transistors with Various Al Compositions.

In this study, we present a detailed analysis of trapping characteristics at the AlxGa1-xN/GaN interface of AlxGa1-xN/GaN high-electron-mobility transistors (HEMTs) with reliability assessments, demonstrating how the composition of the Al in the AlxGa1-xN barrier impacts the performance of the device. Reliability instability assessment in two different AlxGa1-xN/GaN HEMTs [x = 0.25, 0.45] using a single-pulse ID-VD characterization technique revealed higher drain-current degradation (∆ID) with pulse time for Al0.45Ga0.55N/GaN devices which correlates to the fast-transient charge-trapping in the defect sites near the interface of AlxGa1-xN/GaN. Constant voltage stress (CVS) measurement was used to analyze the charge-trapping phenomena of the channel carriers for long-term reliability testing. Al0.45Ga0.55N/GaN devices exhibited higher-threshold voltage shifting (∆VT) caused by stress electric fields, verifying the interfacial deterioration phenomenon. Defect sites near the interface of the AlGaN barrier responded to the stress electric fields and captured channel electrons-resulting in these charging effects that could be partially reversed using recovery voltages. The quantitative extraction of volume trap density (Nt) using 1/f low-frequency noise characterizations unveiled a 40% reduced Nt for the Al0.25Ga0.75N/GaN device, further verifying the higher trapping phenomena in the Al0.45Ga0.55N barrier caused by the rougher Al0.45Ga0.55N/GaN interface.

Explicit Thermal Resistance Model of Self-Heating Effects of AlGaN/GaN HEMTs with Linear and Non-Linear Thermal Conductivity.

We presented an explicit empirical model of the thermal resistance of AlGaN/GaN high-electron-mobility transistors on three distinct substrates, including sapphire, SiC, and Si. This model considered both a linear and non-linear thermal resistance model of AlGaN/GaN HEMT, the thickness of the host substrate layers, and the gate length and width. The non-linear nature of channel temperature-visible at the high-power dissipation stage-along with linear dependency, was constructed within a single equation. Comparisons with the channel temperature measurement procedure (DC) and charge-control-based device modeling were performed to verify the model's validity, and the results were in favorable agreement with the observed model data, with only a 1.5% error rate compared to the measurement data. An agile expression for the channel temperature is also important for designing power devices and monolithic microwave integrated circuits. The suggested approach provides several techniques for investigation that could otherwise be impractical or unattainable when utilizing time-consuming numerical simulations.

A quantitative approach for trap analysis between Al0.25Ga0.75N and GaN in high electron mobility transistors.

The characteristics of traps between the Al0.25Ga0.75N barrier and the GaN channel layer in a high-electron-mobility-transistors (HEMTs) were investigated. The interface traps at the Al0.25Ga0.75N/GaN interface as well as the border traps were experimentally analyzed because the Al0.25Ga0.75N barrier layer functions as a dielectric owing to its high dielectric constant. The interface trap density Dit and border trap density Nbt were extracted from a long-channel field-effect transistor (FET), conventionally known as a FATFET structure, via frequency-dependent capacitance-voltage (C-V) and conductance-voltage (G-V) measurements. The minimum Dit value extracted by the conventional conductance method was 2.5 × 1012 cm-2·eV-1, which agreed well with the actual transistor subthreshold swing of around 142 mV·dec-1. The border trap density Nbt was also extracted from the frequency-dependent C-V characteristics using the distributed circuit model, and the extracted value was 1.5 × 1019 cm-3·eV-1. Low-frequency (1/f) noise measurement provided a clearer picture of the trapping-detrapping phenomena in the Al0.25Ga0.75N layer. The value of the border trap density extracted using the carrier-number-fluctuation (CNF) model was 1.3 × 1019 cm-3·eV-1, which is of a similar level to the extracted value from the distributed circuit model.