Plasmonic nanohole array for enhancing the SERS signal of a single layer of graphene in water.

We numerically design and experimentally test a SERS-active substrate for enhancing the SERS signal of a single layer of graphene (SLG) in water. The SLG is placed on top of an array of silver-covered nanoholes in a polymer and is covered with water. Here we report a large enhancement of up to 2 × 105 in the SERS signal of the SLG on the patterned plasmonic nanostructure for a 532 nm excitation laser wavelength. We provide a detailed study of the light-graphene interactions by investigating the optical absorption in the SLG, the density of optical states at the location of the SLG, and the extraction efficiency of the SERS signal of the SLG. Our numerical calculations of both the excitation field and the emission rate enhancements support the experimental results. We find that the enhancement is due to the increase in the confinement of electromagnetic fields on the location of the SLG that results in enhanced light absorption in the graphene at the excitation wavelength. We also find that water droplets increase the density of optical radiative states at the location of the SLG, leading to enhanced spontaneous emission rate of graphene at its Raman emission wavelengths.

High-Gain Graphene Transistors with a Thin AlOx Top-Gate Oxide.

The high-frequency performance of transistors is usually assessed by speed and gain figures of merit, such as the maximum oscillation frequency f max, cutoff frequency f T, ratio f max/f T, forward transmission coefficient S 21, and open-circuit voltage gain A v. All these figures of merit must be as large as possible for transistors to be useful in practical electronics applications. Here we demonstrate high-performance graphene field-effect transistors (GFETs) with a thin AlOx gate dielectric which outperform previous state-of-the-art GFETs: we obtained f max/f T > 3, A v > 30 dB, and S 21 = 12.5 dB (at 10 MHz and depending on the transistor geometry) from S-parameter measurements. A dc characterization of GFETs in ambient conditions reveals good current saturation and relatively large transconductance ~600 S/m. The realized GFETs offer the prospect of using graphene in a much wider range of electronic applications which require substantial gain.

Scaling of graphene integrated circuits.

The influence of transistor size reduction (scaling) on the speed of realistic multi-stage integrated circuits (ICs) represents the main performance metric of a given transistor technology. Despite extensive interest in graphene electronics, scaling efforts have so far focused on individual transistors rather than multi-stage ICs. Here we study the scaling of graphene ICs based on transistors from 3.3 to 0.5 µm gate lengths and with different channel widths, access lengths, and lead thicknesses. The shortest gate delay of 31 ps per stage was obtained in sub-micron graphene ROs oscillating at 4.3 GHz, which is the highest oscillation frequency obtained in any strictly low-dimensional material to date. We also derived the fundamental Johnson limit, showing that scaled graphene ICs could be used at high frequencies in applications with small voltage swing.

Annealing free, clean graphene transfer using alternative polymer scaffolds.

We examine the transfer of graphene grown by chemical vapor deposition (CVD) with polymer scaffolds of poly(methyl methacrylate) (PMMA), poly(lactic acid) (PLA), poly(phthalaldehyde) (PPA), and poly(bisphenol A carbonate) (PC). We find that optimally reactive PC scaffolds provide the cleanest graphene transfers without any annealing, after extensive comparison with optical microscopy, x-ray photoelectron spectroscopy, atomic force microscopy, and scanning tunneling microscopy. Comparatively, films transferred with PLA, PPA, PMMA/PC, and PMMA have a two-fold higher roughness and a five-fold higher chemical doping. Using PC scaffolds, we demonstrate the clean transfer of CVD multilayer graphene, fluorinated graphene, and hexagonal boron nitride. Our annealing free, PC transfers enable the use of atomically-clean nanomaterials in biomolecule encapsulation and flexible electronic applications.

High field breakdown characteristics of carbon nanotube thin film transistors.

The high field properties of carbon nanotube (CNT) network thin film transistors (CN-TFTs) are important for their practical operation, and for understanding their reliability. Using a combination of experimental and computational techniques we show how the channel geometry (length L(C) and width W(C)) and network morphology (average CNT length L(t) and alignment angle distribution θ) affect heat dissipation and high field breakdown in such devices. The results suggest that when WC ≥ L(t), the breakdown voltage remains independent of W(C) but varies linearly with L(C). The breakdown power varies almost linearly with both W(C) and L(C) when WC >> L(t). We also find that the breakdown power is more susceptible to the variability in the network morphology compared to the breakdown voltage. The analysis offers new insight into the tunable heat dissipation and thermal reliability of CN-TFTs, which can be significantly improved through optimization of the network morphology and device geometry.

Gigahertz integrated graphene ring oscillators.

Ring oscillators (ROs) are the most important class of circuits used to evaluate the performance limits of any digital technology. However, ROs based on low-dimensional nanomaterials (e.g., 1-D nanotubes, nanowires, 2-D MoS2) have so far exhibited limited performance due to low current drive or large parasitics. Here we demonstrate integrated ROs fabricated from wafer-scale graphene grown by chemical vapor deposition. The highest oscillation frequency was 1.28 GHz, while the largest output voltage swing was 0.57 V. Both values remain limited by parasitic capacitances in the circuit rather than intrinsic properties of the graphene transistor components, suggesting further improvements are possible. The fabricated ROs are the fastest realized in any low-dimensional nanomaterial to date and also the least sensitive to fluctuations in the supply voltage. They represent the first integrated graphene oscillators of any kind and can also be used in a wide range of applications in analog electronics. As a demonstration, we also realized the first stand-alone graphene mixers that do not require external oscillators for frequency conversion. The first gigahertz multitransistor graphene integrated circuits demonstrated here pave the way for application of graphene in high-speed digital and analog circuits in which high operating speed could be traded off against power consumption.

High-field electrical and thermal transport in suspended graphene.

We study the intrinsic transport properties of suspended graphene devices at high fields (≥1 V/µm) and high temperatures (≥1000 K). Across 15 samples, we find peak (average) saturation velocity of 3.6 × 10(7) cm/s (1.7 × 10(7) cm/s) and peak (average) thermal conductivity of 530 W m(-1) K(-1) (310 W m(-1) K(-1)) at 1000 K. The saturation velocity is 2-4 times and the thermal conductivity 10-17 times greater than in silicon at such elevated temperatures. However, the thermal conductivity shows a steeper decrease at high temperature than in graphite, consistent with stronger effects of second-order three-phonon scattering. Our analysis of sample-to-sample variation suggests the behavior of "cleaner" devices most closely approaches the intrinsic high-field properties of graphene. This study reveals key features of charge and heat flow in graphene up to device breakdown at ~2230 K in vacuum, highlighting remaining unknowns under extreme operating conditions.

In(x)Ga(1-x)As nanowire growth on graphene: van der Waals epitaxy induced phase segregation.

The growth of high-density arrays of vertically oriented, single crystalline InAs NWs on graphene surfaces are realized through the van der Waals (vdW) epitaxy mechanism by metalorganic chemical vapor deposition (MOCVD). However, the growth of InGaAs NWs on graphene results in spontaneous phase separation starting from the beginning of growth, yielding a well-defined InAs-In(x)Ga(1-x)As (0.2 < x < 1) core-shell structure. The core-shell structure then terminates abruptly after about 2 µm in height, and axial growth of uniform composition In(x)Ga(1-x)As takes place without a change in the NW diameter. The In(x)Ga(1-x)As shell composition changes as a function of indium flow, but the core and shell thicknesses and the onset of nonsegregated In(x)Ga(1-x)As axial segment are independent of indium composition. In contrast, no InGaAs phase segregation has been observed when growing on MoS2, another two-dimensional (2D) layered material, or via the Au-assisted vapor-liquid-solid (VLS) mechanism on graphene. This spontaneous phase segregation phenomenon is elucidated as a special case of van der Waals epitaxy on 2D sheets. Considering the near lattice matched registry between InAs and graphene, InGaAs is forced to self-organize into InAs core and InGaAs shell segments since the lack of dangling bonds on graphene does not allow strain sharing through elastic deformation between InGaAs and graphene.

Self-aligned nanotube-nanowire phase change memory.

A central issue of nanoelectronics concerns their fundamental scaling limits, that is, the smallest and most energy-efficient devices that can function reliably. Unlike charge-based electronics that are prone to leakage at nanoscale dimensions, memory devices based on phase change materials (PCMs) are more scalable, storing digital information as the crystalline or amorphous state of a material. Here, we describe a novel approach to self-align PCM nanowires with individual carbon nanotube (CNT) electrodes for the first time. The highly scaled and spatially confined memory devices approach the ultimate scaling limits of PCM technology, achieving ultralow programming currents (~0.1 µA set, ~1.6 µA reset), outstanding on/off ratios (~10(3)), and improved endurance and stability at few-nanometer bit dimensions. In addition, the powerful yet simple nanofabrication approach described here can enable confining and probing many other nanoscale and molecular devices self-aligned with CNT electrodes.

High-field transport and thermal reliability of sorted carbon nanotube network devices.

We examine the high-field operation, power dissipation, and thermal reliability of sorted carbon nanotube network (CNN) devices, with <1% to >99% semiconducting nanotubes. We combine systematic electrical measurements with infrared (IR) thermal imaging and detailed Monte Carlo simulations to study high-field transport up to CNN failure by unzipping-like breakdown. We find that metallic CNNs carry peak current densities up to an order of magnitude greater than semiconducting CNNs at comparable nanotube densities. Metallic CNNs also appear to have a factor of 2 lower intrinsic thermal resistance, suggesting a lower thermal resistance at metallic nanotube junctions. The performance limits and reliability of CNNs depend on their makeup, and could be improved by carefully engineered heat dissipation through the substrate, contacts, and nanotube junctions. These results are essential for optimization of CNN devices on transparent or flexible substrates which typically have very low thermal conductivity.

Transport in nanoribbon interconnects obtained from graphene grown by chemical vapor deposition.

We study graphene nanoribbon (GNR) interconnects obtained from graphene grown by chemical vapor deposition (CVD). We report low- and high-field electrical measurements over a wide temperature range, from 1.7 to 900 K. Room temperature mobilities range from 100 to 500 cm(2)·V(-1)·s(-1), comparable to GNRs from exfoliated graphene, suggesting that bulk defects or grain boundaries play little role in devices smaller than the CVD graphene crystallite size. At high-field, peak current densities are limited by Joule heating, but a small amount of thermal engineering allows us to reach ∼2 × 10(9) A/cm(2), the highest reported for nanoscale CVD graphene interconnects. At temperatures below ∼5 K, short GNRs act as quantum dots with dimensions comparable to their lengths, highlighting the role of metal contacts in limiting transport. Our study illustrates opportunities for CVD-grown GNRs, while revealing variability and contacts as remaining future challenges.

Cascading wafer-scale integrated graphene complementary inverters under ambient conditions.

The fundamental building blocks of digital electronics are logic gates which must be capable of cascading such that more complex logic functions can be realized. Here we demonstrate integrated graphene complementary inverters which operate with the same input and output voltage logic levels, thus allowing cascading. We obtain signal matching under ambient conditions with inverters fabricated from wafer-scale graphene grown by chemical vapor deposition (CVD). Monolayer graphene was incorporated in self-aligned field-effect transistors in which the top gate overlaps with the source and drain contacts. This results in full-channel gating and leads to the highest low-frequency voltage gain reported so far in top-gated CVD graphene devices operating in air ambient, A(v) ∼ -5. Such gain enabled logic inverters with the same voltage swing of 0.56 V at their input and output. Graphene inverters could find their way in realistic applications where high-speed operation is desired but power dissipation is not a concern, similar to emitter-coupled logic.

Electronic transport in graphitic nanoribbon films.

We fabricate, pattern, and analyze thin films composed of multilayer graphene nanoribbons. These films are conductive at room temperature but depict noticeable insulating behavior at low temperatures (<20 K) due to their disordered structure. We study the transport in this strong localization regime by analyzing the dependence of resistivity on temperature and electric and magnetic fields in the framework of the variable range hopping theory. Resistivity dependence on the magnetic field confirms the insulating behavior of the films and can be fitted effectively by forward interference scattering and wave function shrinkage models at low and high magnetic field regimes, respectively. We extract large localization lengths in the range of ∼45-90 nm from both the magnetic and electric field dependence of resistivity and relate these values to the high conductance in the nanoribbons and/or good contact between them. By revealing the fundamental structural and transport properties of graphitic nanoribbon films, our results help devise methods to further improve these films for electronic and photonic device applications.

Resistivity in percolation networks of one-dimensional elements with a length distribution.

One-dimensional (1D) nanoelements, such as nanotubes and nanowires, making up percolation networks are typically modeled as fixed length sticks in order to calculate their electrical properties. In reality, however, the lengths of these 1D nanoelements comprising such networks are not constant, rather they exhibit a length distribution. Using Monte Carlo simulations, we have studied the effect of this nanotube and/or nanowire length distribution on the resistivity in 1D nanoelement percolation networks. We find that, for junction resistance-dominated random networks, the resistivity correlates with root-mean-square element length, whereas for element resistance-dominated random networks, the resistivity scales with average element length. If the elements are preferentially aligned, we find that these two trends shift toward higher power means. We explain the physical origins of these simulation results using geometrical arguments. These results emphasize the importance of the element length distribution in determining the resistivity in these networks.