Elementary cellular automata realized by stateful three-memristor logic operations.

Cellular automata (CA) are computational systems that exhibit complex global behavior arising from simple local rules, making them a fascinating candidate for various research areas. However, challenges such as limited flexibility and efficiency on conventional hardware platforms still exist. In this study, we propose a memristor-based circuit for implementing elementary cellular automata (ECA) by extending the stateful three-memristor logic operations derived from material implication (IMP) logic gates. By leveraging the inherent physical properties of memristors, this approach offers simplicity, minimal operational steps, and high flexibility in implementing ECA rules by adjusting the circuit parameters. The mathematical principles governing circuit parameters are analyzed, and the evolution of multiple ECA rules is successfully demonstrated, showcasing the robustness in handling the stochastic nature of memristors. This approach provides a hardware solution for ECA implementation and opens up new research opportunities in the hardware implementation of CA.

Dual functional states of working memory realized by memristor-based neural network.

Working memory refers to the brain's ability to store and manipulate information for a short period. It is disputably considered to rely on two mechanisms: sustained neuronal firing, and "activity-silent" working memory. To develop a highly biologically plausible neuromorphic computing system, it is anticipated to physically realize working memory that corresponds to both of these mechanisms. In this study, we propose a memristor-based neural network to realize the sustained neural firing and activity-silent working memory, which are reflected as dual functional states within memory. Memristor-based synapses and two types of artificial neurons are designed for the Winner-Takes-All learning rule. During the cognitive task, state transformation between the "focused" state and the "unfocused" state of working memory is demonstrated. This work paves the way for further emulating the complex working memory functions with distinct neural activities in our brains.

Ultra-High-Speed Accelerator Architecture for Convolutional Neural Network Based on Processing-in-Memory Using Resistive Random Access Memory.

Processing-in-Memory (PIM) based on Resistive Random Access Memory (RRAM) is an emerging acceleration architecture for artificial neural networks. This paper proposes an RRAM PIM accelerator architecture that does not use Analog-to-Digital Converters (ADCs) and Digital-to-Analog Converters (DACs). Additionally, no additional memory usage is required to avoid the need for a large amount of data transportation in convolution computation. Partial quantization is introduced to reduce the accuracy loss. The proposed architecture can substantially reduce the overall power consumption and accelerate computation. The simulation results show that the image recognition rate for the Convolutional Neural Network (CNN) algorithm can reach 284 frames per second at 50 MHz using this architecture. The accuracy of the partial quantization remains almost unchanged compared to the algorithm without quantization.

Transparent electronic and photoelectric synaptic transistors based on the combination of an InGaZnO channel and a TaOx gate dielectric.

A transparent thin film transistor (TFT) based on the combination of an InGaZnO channel and a high-κ (the dielectric constant is about 42.6) TaOx gate dielectric layer is fabricated. The TFT shows robust anticlockwise hysteresis under DC voltage sweep and synaptic behaviors (i.e., excitatory postsynaptic current, short-term memory plasticity, short-term memory to long-term memory transition, and potentiation and depression) under voltage pulse stimulus. In addition, the TFT shows high responsivity to illumination of light with various wavelengths (ultraviolet and visible light). Synaptic behaviors in response to light pulse stimuli, which could be employed in vision-based neuromorphic applications, are demonstrated. Large conductance change (Gmax/Gmin > 10) and ultra-low non-linearity (α < 0.5) of the potentiation and depression can be inspired by either gate bias pulses or photoelectric pulses with short pulse widths and small amplitudes.

Uncovering the Indium Filament Revolution in Transparent Bipolar ITO/SiOx/ITO Resistive Switching Memories.

Transparent resistive switching random access memory (ReRAM) is of interest for the future integrated invisible circuitry. However, poor understanding of its working mechanism in transparent ReRAMs with the indium tin oxide (ITO) electrode is still a critical problem and will hinder its widespread applications. To reveal the actual working mechanism in transparent ReRAMs with the ITO electrode, we investigate the transparent ITO/SiOx/ITO memory devices (∼82% transmittance in the visible region) and compare it with ITO/SiOx/Au memory devices, which both can exhibit reproducible bipolar switching. The indium (In) filament evolution, which accounts for the bipolar switching behaviors in the ITO/SiOx/ITO (or Au) memories, is directly observed using transmission electron microscopy on samples with different memory states (electroformed, ON, and OFF). These studies uncover the microscopic mechanism behind the bipolar switching in SiOx-based ReRAM devices with the ITO electrode, providing a general guidance for the design of high-performance ReRAMs with large scalability and high endurance.

Application of Deep Compression Technique in Spiking Neural Network Chip.

In this paper, a reconfigurable and scalable spiking neural network processor, containing 192 neurons and 6144 synapses, is developed. By using deep compression technique in spiking neural network chip, the amount of physical synapses can be reduced to 1/16 of that needed in the original network, while the accuracy is maintained. This compression technique can greatly reduce the number of SRAMs inside the chip as well as the power consumption of the chip. This design achieves throughput per unit area of 1.1 GSOP/([Formula: see text]) at 1.2 V, and energy consumed per SOP of 35 pJ. A 2-layer fully-connected spiking neural network is mapped to the chip, and thus the chip is able to realize handwritten digit recognition on MNIST with an accuracy of 91.2%.

Optical-reconfigurable carbon nanotube and indium-tin-oxide complementary thin-film transistor logic gates.

Optically transparent thin-film transistors (TFTs) have recently attracted significant attention for a new generation of transparent electronics where p- and n-channel transistors form the basic building block for complementary analog and digital integrated circuits (ICs). This paper reports a hybrid integration of p-channel carbon nanotube (CNT) and n-channel junctionless indium-tin-oxide (ITO) TFTs using a simple and cost-effective shadow mask-assisted fabrication process. The fabricated devices exhibit a high transmittance of ∼90% in the visible light region and function as inverters, NAND and NOR gates. More interestingly, distinct optoelectronic responses of the CNT- and ITO-TFTs to ultraviolet light have been clearly observed. In addition to conventional electrically gated logic operations, simple optical-reconfigurable logic operations have been realized with hybrid CNT/ITO-TFT based logic gates. The results suggest that introducing optical-modulation to the logic gates could increase the functionalities compared with the traditional electrically driven counterparts.

A Deformable and Highly Robust Ethyl Cellulose Transparent Conductor with a Scalable Silver Nanowires Bundle Micromesh.

Huge challenges remain regarding the facile fabrication of neat metallic nanowires mesh for high-quality transparent conductors (TCs). Here, a scalable metallic nanowires bundle micromesh is achieved readily by a spray-assisted self-assembly process, resulting in a conducting mesh with controllable ring size (4-45 µm) that can be easily realized on optional polymer substrates, rendering it transferable to various deformable and transparent substrates. The resultant conductors with the embedded nanowires bundle micromesh deliver superior and customizable optoelectronic performances, and can sustain various mechanical deformations, environmental exposure, and severe washing, exhibiting feasibility for large-scale manufacturing. The silver nanowires bundle micromesh with explicit conductive paths is embedded into an ethyl cellulose (EC) transparent substrate to achieve superior optoelectronic properties endowed by a low amount of incorporated nanowires, which leads to reduced extinction cross-section as verified by optical simulation. A representative EC conductor with a low sheet resistance of 25 Ω â–¡-1 , ultrahigh transmittance of 97%, and low haze of 2.6% is attained, with extreme deformability (internal bending radius of 5 µm) and waterproofing properties, opening up new possibilities for low-cost and scalable TCs to replace indium-tin oxide (ITO) for future flexible electronics, as demonstrated in a capacitive touch panel in this work.

Resonant scattering of green light enabled by Ag@TiO2 and its application in a green light projection screen.

The ability to selectively scatter green light is essential for an RGB transparent projection display, and this can be achieved by a silver-core, titania-shell nanostructure (Ag@TiO2), based on the metallic nanoparticle's localized surface plasmon resonance. The ability to selectively scatter green light is shown in a theoretical design, in which structural optimization is included, and is then experimentally verified by characterization of a transparent film produced by dispersing such nanoparticles in a polymer matrix. A visual assessesment indicates that a high-quality green image can be clearly displayed on the transparent film. For completeness, a theoretical design for selective scattering of red light based on Ag@TiO2 is also shown.

Unlocking the potential of SnS2: Transition metal catalyzed utilization of reversible conversion and alloying reactions.

The alloying-dealloying reactions of SnS2 proceeds with the initial conversion reaction of SnS2 with lithium that produces Li2S. Unfortunately, due to the electrochemical inactivity of Li2S, the conversion reaction of SnS2 is irreversible, which significantly limit its potential applications in lithium-ion batteries. Herein, a systematic understanding of transition metal molybdenum (Mo) as a catalyst in SnS2 anode is presented. It is found that Mo catalyst is able to efficiently promote the reversible conversion of Sn to SnS2. This leads to the utilization of both conversion and alloying reactions in SnS2 that greatly increases lithium storage capability of SnS2. Mo catalyst is introduced in the form of MoS2 grown directly onto self-assembled vertical SnS2 nanosheets that anchors on three-dimensional graphene (3DG) creating a hierarchal nanostructured named as SnS2/MoS2/3DG. The catalytic effect results in a significantly enhanced electrochemical properties of SnS2/MoS2/3DG; a high initial Coulombic efficiency (81.5%) and high discharge capacities of 960.5 and 495.6 mA h g-1 at current densities of 50 and 1000 mA g-1, respectively. Post cycling investigations using ex situ TEM and XPS analysis verifies the successful conversion reaction of SnS2 mediated by Mo. The successful integration of catalyst on alloying type metal sulfide anode creates a new avenue towards high energy density lithium anodes.

Direct Observation of Indium Conductive Filaments in Transparent, Flexible, and Transferable Resistive Switching Memory.

Electronics with multifunctionalities such as transparency, portability, and flexibility are anticipated for future circuitry development. Flexible memory is one of the indispensable elements in a hybrid electronic integrated circuit as the information storage device. Herein, we demonstrate a transparent, flexible, and transferable hexagonal boron nitride (hBN)-based resistive switching memory with indium tin oxide (ITO) and graphene electrodes on soft polydimethylsiloxane (PDMS) substrate. The ITO/hBN/graphene/PDMS memory device not only exhibits excellent performance in terms of optical transmittance (∼85% in the visible wavelength), ON/OFF ratio (∼480), retention time (∼5 × 104 s) but also shows robust flexibility under bending conditions and stable operation on arbitrary substrates. More importantly, direct observation of indium filaments in an ITO/hBN/graphene device is found via ex situ transmission electron microscopy, which provides critical insight on the complex resistive switching mechanisms.

Direct Observation of Conducting Filaments in Tungsten Oxide Based Transparent Resistive Switching Memory.

Transparent nonvolatile memory has great potential in integrated transparent electronics. Here, we present highly transparent resistive switching memory using stoichiometric WO3 film produced by cathodic electrodeposition with indium tin oxide electrodes. The memory device demonstrates good optical transmittance, excellent operative uniformity, low operating voltages (+0.25 V/-0.42 V), and long retention time (>104 s). Conductive atomic force microscopy, ex situ transmission electron microscopy, and X-ray photoelectron spectroscopy experiments directly confirm that the resistive switching effects occur due to the electric field-induced formation and annihilation of the tungsten-rich conductive channel between two electrodes. Information on the physical and chemical nature of conductive filaments offers insightful design strategies for resistive switching memories with excellent performances. Moreover, we demonstrate the promising applicability of the cathodic electrodeposition method for future resistive memory devices.

Two dimensional layered Co0.85Se nanosheets as a high-capacity anode for lithium-ion batteries.

In recent years, two-dimensional (2D) layered transitional metal chalcogenides (TMCs) have received much attention as promising electrode materials in energy storage. Although recent reports on 2D TMC nanostructures have demonstrated promising electrochemical performances, the major scientific challenge is to develop a viable synthesis process to produce layered structures of chalcogenides (Co, Ni or Fe based TMCs) as anode materials. In this work, we propose the synthesis of layered Co0.85Se nanosheets in a solution based method by using a 2D oriented attachment strategy. The as-prepared Co0.85Se nanosheets exhibit specific capacities as high as 675 mA h g(-1) at 100 mA g(-1). When the current densities were further increased to 200, 500 and 1000 mA g(-1), the reversible capacities can still reach up to 645, 574 and 493 mA h g(-1) with excellent cycling life of 95, 85 and 73%, respectively. Li-ion storage performance of layered Co0.85Se nanosheets is higher than that of Co0.85Se microspheres as well as cobalt sulfide. The superior electrochemical performance of Co0.85Se nanosheets is attributed to their 2D layered structure which enhances electrical conductivity and improves diffusion pathways of the Li-ion within the host material. The synthesis method described in this work serves as a general route for the design and preparation of other 2D layered TMCs.

Ultrahigh Performance of Novel Capacitive Deionization Electrodes based on A Three-Dimensional Graphene Architecture with Nanopores.

In order to achieve optimal desalination during capacitive deionization (CDI), CDI electrodes should possess high electrical conductivity, large surface area, good wettability to water, narrow pore size distribution and efficient pathways for ion and electron transportation. In this work, we fabricated a novel CDI electrode based on a three-dimensional graphene (3DG) architecture by constructing interconnected graphene sheets with in-plane nanopores (NP-3DG). As compared to 3DG, NP-3DG features a larger specific surface area of 445 m(2) g(-1) and therefore the higher specific capacitance. The ultrahigh electrosorptive capacity of NP-3DG predicted from Langmuir isotherm is 17.1 mg g(-1) at a cell potential of 1.6 V. This can be attributed to the interconnected macropores within the graphene networks and nanopores on graphene sheets. Both of macropores and nanopores are favorable for enhancing CDI performance by buffering ions to reduce the diffusion distances from the external electrolyte to the interior surfaces and enlarging the surface area.

Wavelength tunable electroluminescence from randomly assembled n-CdS(x)Se(1-x) nanowires/p+-SiC heterojunction.

Visible electroluminescence (EL) with tunable wavelength has been observed at room temperature from randomly assembled n-CdS(x)Se(1-x) nanowires grown on a p(+)-SiC substrate by the vapor transport technique. The dominant emission peaks can be tuned from ∼720 to ∼520 nm by varying the composition of the alloy nanowires.