Rapid ultrasensitive and specific BNP biosensor with LED readout.

Biosensing for diagnostics has risen rapidly in popularity over the past decades. With the discovery of new nanomaterials and morphologies, sensitivity is being constantly improved enough for reliable detection of trace biomarkers in human samples, like serum or sweat. This precision has enabled detailed research on the efficacy of biosensors. However, current biosensors suffer from reduced speed of operation. To make better use of this sensitivity, the development of a conductometric biosensor with in-situ use of an Laser Emitting Device (LED) display can provide rapid determination of sample results, steadily pushing biosensors toward more clinical, point-of-care (POC) applications. In this research, a simple LED was used for facile optical determination and visual output of an ultrasensitive bio-signal amplification circuit was made to interface with a B-type Natriuretic Peptide (BNP) biosensor. Tuning circuit gain enables an elegant method for adjustable separation of concentrations into 3 discrete categories: sub-threshold, analog, and saturation regions. These regions corresponded to 0 < [C] < 500 pg/mL (25, 100, 250 pg/mL, LED off), 500 < [C] < 1000 pg/mL (LED varying intensity), and 1000 pg/mL < [C] (LED full intensity). System efficacy was tested using human blood serum samples from University of Pittsburgh Medical Center patients, which were able to be accurately detected and sorted for rapid low cost and power. determination without need for complex digital elements. Additional specificity testing suggests insignificant impact of non-target biomarkers.

A Study on the Role of Pre-Cleaning and a New Method to Strengthen Gate Oxide Quality.

Isopropyl alcohol (IPA) has been conventionally used for pre-cleaning processes. As the device size decreased, the gate oxide layer became thinner. As a result, the quality of the gate oxide was degraded by a pre-cleaning process, and oxide reliabilities and product yield were affected. In this study, we investigate whether the carbon generated on the silicon interface after the IPA drying process might have induced gate oxide breakdown. Time-dependent dielectric breakdown (TDDB) failure increased in frequency since carbon contaminations were increased in the oxide according to the amount of IPA. Organic contaminations resulted in a lower energy level, and electron tunneling occurred through the gate oxide. When an external electric field was applied, organic materials in the gate oxide layer were aligned, and a percolation path formed to cause breakdown. Finally, we suggest a new cleaning method using carbon-free O3 deionized (DI) water as a dry-cleaning method to improve oxide dielectric breakdown. An O3 DI dry cleaning process could reduce carbon particles in the oxide layer and decrease gate oxide failure by 7%.

Highly Reliable Flexible Device with a Charge Compensation Layer.

Flexible devices fabricated with a polyimide (PI) substrate are essential for foldable, rollable, and stretchable products and various applications. However, inherent technical challenges remain in mobile charge-induced device instabilities and image retention, significantly hindering future technologies. Here, we introduce a new barrier material, SiCOH, into the backplane of amorphous indium gallium zinc oxide (a-IGZO) thin-film transistors (TFTs) and applied it to production-level flexible panels. We found that the SiCOH layer effectively compensates for the surface charging induced by fluorine ions at the interface between the PI substrate and the barrier layer under bias stress, thereby preventing abnormal positive shifts in threshold voltage (Vth) and image disturbance. The a-IGZO TFTs and metal-insulator-metal and metal-insulator-semiconductor capacitors with a SiCOH layer demonstrate reliable device performance, Vth shifts, and capacitance changes with an increase in gate bias stress. A flexible device with SiCOH enables the suppression of abnormal Vth shifts associated with PIs and plays a vital role in image sticking. This work provides new insights into process integrity and paves the way for expediting versatile form factors.

Effects of polyimide curing on image sticking behaviors of flexible displays.

Flexible displays on a polyimide (PI) substrate are widely regarded as a promising next-generation display technology due to their versatility in various applications. Among other bendable materials used as display panel substrates, PI is especially suitable for flexible displays for its high glass transition temperature and low coefficient of thermal expansion. PI cured under various temperatures (260 °C, 360 °C, and 460 °C) was implemented in metal-insulator-metal (MIM) capacitors, amorphous indium gallium zinc oxide (a-IGZO) thin-film transistors (TFT), and actual display panels to analyze device stability and panel product characteristics. Through electrical analysis of the MIM capacitor, it was confirmed that the charging effect in the PI substrates intensified as the PI curing temperature increased. The threshold voltage shift (ΔVth) of the samples was found to increase with rising curing temperature under negative bias temperature stress (NBTS) due to the charging effect. Our analyses also show that increasing ΔVth exacerbates the image sticking phenomenon observed in display panels. These findings ultimately present a direct correlation between the curing temperature of polyimide substrates and the panel image sticking phenomenon, which could provide an insight into the improvement of future PI-substrate-based displays.

Enhanced Hole Injection Characteristics of a Top Emission Organic Light-Emitting Diode with Pure Aluminum Anode.

A top emitting organic light-emitting diode (OLED) device with pure aluminum (Al) anode for high-resolution microdisplays was proposed and fabricated. The low work function of the Al anode, even with a native oxide formed on the Al anode surface, increases the energy barrier of the interface between the anode and hole injection layer, and has poor hole-injection properties, which causes the low efficiency of the device. To enhance the hole-injection characteristics of the Al anode, we applied hexaazatriphenylene hexacarbonitrile (HATCN) as the hole-injection layer material. The proposed OLED device with a pure Al anode and native oxide on the anode surface improved efficiency by up to 35 cd/A at 1000 nit, which is 78% of the level of normal OLEDs with indium tin oxide (ITO) anode.

Threshold voltage instability and polyimide charging effects of LTPS TFTs for flexible displays.

In this paper, we investigate the Vth shift of p-type LTPS TFTs fabricated on a polyimide (PI) and glass substrate considering charging phenomena. The Vth of the LTPS TFTs with a PI substrate positively shift after a bias temperature stress test. However, the Vth with a glass substrate rarely changed even with increasing stress. Such a positive Vth shift results from the negative charging of fluorine stemmed from the PI under the gate bias. In fact, the C-V characterization on the metal-insulator-metal capacitor reveals that charging at the SiO2/PI interface depends on the applied gate bias and the PI material, which agrees well with the TCAD simulation and SIMS analyses. As a result, the charging at the SiO2/PI interface contributes to the Vth shift of the LTPS TFTs leading to image sticking.

Negative Bias Instability of InZnO-Based Thin-Film Transistors Under Illumination Stress.

In this study, we investigated the threshold voltage (Vth) instability of solution-processed indium zinc oxide (IZO) thin film transistors (TFTs) prior to and after negative bias illumination stress (NBIS) with varying carrier suppressors (Ga, Al, Hf, and Zr). Variations in electrical properties of the IZO-based TFTs as a function of carrier suppressors were attributed to the differences in metal-oxygen bonding energy of the materials, which was numerically verified by calculating the relative oxygen deficient ratio from the X-ray photoelectron spectroscopy analysis. Furthermore, the values of Vth shift (ΔVth) of the devices subjected to negative gate bias stress under 635 nm (red), 530 nm (green), and 480 nm (blue) wavelength light irradiation increased as the incident photon energy increased. IZO TFTs doped with Ga atoms demonstrated weaker metal-oxygen bonding energy compared to the others and exhibited the largest ΔVth. This result was attributed to the suppressor-dependent distribution of neutral oxygen vacancies which determine the degrees of photon energy absorption in the IZO films. Then, the ΔVth instability of IZO-based TFTs under NBIS correlated well with a stretched exponential function.

Leakage Current Analysis Method for Metal Insulator Semiconductor Capacitors Through Low-Frequency Noise Measurement.

Use of thinner oxides to improve the operating speed of a complementary metal-oxidesemiconductor (CMOS) device causes serious gate leakage problems. Leakage current of the dielectric analysis method has I-V, C-V, and charge pumping, but the procedure is very complicated. In this premier work, we analyzed the leakage current of metal insulator semiconductor (MIS) capacitors with different initiators through low-frequency noise (LFN) measurement with simplicity and high sensitivity. The LFN measurement results show a correlation between power spectral density (SIG) and gate leakage current (IG). MIS capacitors of hafnium zirconium silicate (HZS, (HfZrO4)1-x (SiO2)x) were used for the experiments with varying SiO2 ratio (x = 0, 0.1, 0.2) of hafnium zirconium oxide (HZO, HfZrO4). As the SiO2 ratio increased, the leakage current decreased according to J-V measurement. Further, the C-V measurement confirmed that the oxide-trapped charge (Not) increased with increasing SiO2 ratio. Finally, the LFN measurement method revealed that the cause of leakage current reduction was trap density reduction of the insulator.

Effects of Plasma Damage Removal on Direct Contact Resistance and Hot-Electron-Induced Punch Through (HEIP) of PMOSFETs.

In order to reduce contact resistance (Rc) of the source/drain region in nanoscale devices, it is essential to overcome the increasing leakage and hot-electron-induced punch through (HEIP) degradation. In this paper, we propose a simple in situ Si soft treatment technique immediately after direct contact (DC) etching to reduce Rc and minimize HEIP degradation. We found by analysis with a transmission electron microscope, that 10 s of treatment reduced the plasma damaged layer by 19%, which resulted in 10.5% reduction of the P+ contact resistance. For comparison, the P + Rc was reduced by 6.5% when the doping level of the plug implantation was increased by 25%, but the HEIP breakdown voltage (VHEIP) by AC stress was greatly reduced by more than 80 mV, increasing the standby leakage current of DRAM devices. In the case of removing the plasma damage layer, not only did VHIEP not decrease until after 10 s, but also the reduction in Rc was larger than with the plug enhancement. The effect of the plasma damaged layer on HEIP was verified through the plug effect and gate induced drain leakage measurement, based on the distance between the gate and DC for each process. This simple in situ technique not only removed byproducts and the plasma damaged amorphous layer, but it also affected the effective implantation of dopants in subsequent plug processes. It was also cost effective because the process time was short and no extra process steps were added.

Hydrogen Permeation and Its Impacts on the Electrical Performance of Stacked ZrO2/Al2O3/ZrO2 Films.

In this study, the effects of hydrogenation on the dielectric capacitance and leakage current of ZrO2/Al2O3/ZrO2 (ZAZ) films for dynamic-random-access memory (DRAM) capacitors were examined. Hydrogen permeation into ZAZ films reduced the dielectric capacitance and increased the leakage current with continued exposure to hydrogen during the forming gas annealing process. More specifically, the hydrogen ions distributed in the grain boundaries and at the Z/A interfaces appeared to disrupt the dipole motion and diminish the dielectric constant of the film, resulting in a decreased dielectric capacitance. Furthermore, the reaction of hydrogen atoms with the pre-existing oxygen of the ZrO2 films resulted in an oxygen vacancy with two captured electrons. Conduction electrons freed via ionization of the oxygen vacancy increased the conductivity of the ZAZ films, thereby increasing the leakage current throughout the ZAZ films.

Solution-Based Indium-Zinc Oxide/Indium-Gallium-Zinc Oxide Double-Channel Thin-Film Transistors with Incorporated Hydrogen Peroxide.

We fabricated and evaluated solution-based double-channel thin-film transistors (TFTs) that consisted of an indium-zinc oxide (IZO) front layer and an indium-gallium-zinc oxide (IGZO) back channel with the addition of hydrogen peroxide (H2O2). The devices showed superior electrical properties with regard to saturation mobility (12.9 cm2/V·s), the on-off ratio (5 × 107), and the subthreshold swing (0.21 V/decade). All the devices were subjected under bias and illumination stress for reliability assessment. The threshold voltage shift stability of positive and negative bias illumination stress under different wavelengths was also enhanced. Thus, we achieved improved performance using IZO/IGZO TFTs with back channels that incorporated H2O2.

Hafnium Incorporation in InZnO Thin Film Transistors as a Carrier Suppressor.

In this study, we fabricated Hf-doped indium zinc oxide thin-film transistors (HIZO TFTs) using a solution process. Channel layers of the TFTs were optimized by varying the molar ratio of Hf in the channel layers. The electrical properties of the fabricated devices were compared to gallium indium zinc oxide (GIZO). HIZO TFTs showed 0.12 V threshold voltage, 0.45 V/decade subthreshold swing and 1.24 × 106 on-off current ratio, which were excellent compared to that of GIZO. In particular, when a positive gate bias stress of 10 V was applied for 10³ s, the HIZO TFT exhibited a lower threshold voltage shift of 1.11 V than the GIZO TFT (1.88 V). These results originate from the higher oxygen bonding with Hf in IZO compared to Ga atoms. We confirmed that Hf acts as an excellent carrier suppressor whose properties exceed those of Ga.

Defect Analysis and Reliability Characteristics of (HfZrO4)1-x(SiO2)x High-κ Dielectrics.

Hafnium zirconium silicon oxide ((HfZrO4)1-x(SiO2)x) materials were investigated through the defect analysis and reliability characterization for next generation high-κ dielectric. Silicate doped hafnium zirconium oxide (HfZrO4) films showed a reduction of negative flat-band voltage (Vfb) shift compared to pure HfZrO4. This result was caused by a decrease in donor-like interface traps (Dit) and positive border traps (Nbt). As the silicon oxide (SiO2) content increased, the Vfb was shifted in the positive direction from -1.23 to -1.10 to -0.91 V and the slope of the capacitance-voltage (C-V) curve increased. The nonparallel shift of the C-V characteristics was affected by the Dit, while the Nbt was responsible for the parallel C-V curve shift. The values of Dit reduced from 4.3 × 1011, 3.5 × 1011, and 3.0 × 1011 cm-2eV-1, as well as the values of Nbt were decreased from 5.24, 3.90 to 2.26 × 1012 cm-2. Finally, reduction of defects in the HfZrO4-base film with an addition of SiO2 affected the gate oxide reliability characteristics, such as gate leakage current (JG), bias temperature stress instability (BTSI), and time dependent gate dielectric breakdown (TDDB).

Technology Computer-Aided Design-Based Simulation Program with Integrated Circuit Emphasis Model for Back-Channel-Etched Thin-Film Transistors with Floating Metal Components.

We report thin-film transistors (TFTs) with floating metal using a back-channel-etched (BCE) process. Since the BCE process reduces the active mask step compared to other processes, it has attracted attention as a back-plane process that could be used for mass production. To realize the long channel in the BCE process, a floating metal is required; this acts as a bridge in the middle of the channel. We used TCAD (Technology computer-aided design) simulations (Atlas 3D) to predict the characteristics of a-Si TFTs with various active layer thicknesses and numbers of floating metal components; simulation results were compared with real measurements. We explain why TFTs do not scale ideally when floating metals are used; this is related to the resistance and thickness of the active channel. If a thick and highly resistive active channel is used, a larger number of floating metals will require greater correction for ideal scaling. Additionally, considering the capacitance between the source metal and channel, the channel influence under the floating metal should be about 89%. We also suggest a new SPICE (Simulation Program with Integrated Circuit Emphasis) model for TFTs with floating metal based on TCAD simulations.

Effect of Heat Budget After Capacitor Formation on the Leakage Current Characteristics of ZrO2-Based High-k Dielectrics for Next-Generation Dynamic Random-Access Memory Capacitors.

Successful development of 20 nm or smaller dynamic random-access memory (DRAM) requires reduction of the leakage current in capacitors with high-k dielectrics. To reduce the leakage current of the capacitor, we fabricated a ZrO2-based metal-insulator-metal (MIM) capacitor and investigated changes in leakage current characteristics associated with heat budget following capacitor formation. Leakage current characteristics were drastically degraded by applying an additional heat treatment to the MIM capacitor. Through detailed analysis of leakage versus bias voltage (I-V) characteristics, dielectric constants, and high-resolution transmission electron microscopy (HR-TEM) findings, we determined that the leakage current degradation was caused by an increase in Poole-Frenkel (P-F) emission due to an increase in defect density in the dielectrics and an increase in the dielectric constant due to enhancement of the crystallinity of ZrO2. Based on the experimental results, we propose a new, simple strategy to reduce leakage current without changing the capacitor structure or material used in the DRAM manufacturing process. This simple approach will not only enable mass production of 20 nm DRAM, but also contribute to the development of next-generation DRAMs by reducing the leakage current of the capacitor.

Enhanced Light Extraction from Bottom Emission OLEDs by High Refractive Index Nanoparticle Scattering Layer.

High refractive index nanoparticle material was applied as a scattering layer on the inner side of a glass substrate of a bottom emission organic light emitting diode (OLED) device to enhance light extraction and to improve angular color shift. TiO2 and YSZ (Yttria Stabilized Zirconia; Y2O3-ZrO2) were examined as the high refractive index nanoparticles. The nanoparticle material was formed as a scattering layer on a glass substrate by a coating method, which is generally used in the commercial display manufacturing process. Additionally, a planarization layer was coated on the scattering layer with the same method. The implemented nanoparticle material and planarization material endured, without deformation, the subsequent thermal annealing process, which was carried out at temperature ranged to 580 °C. We demonstrated a practical and highly efficient OLED device using the conventional display manufacturing process by implementing the YSZ nanoparticle. We obtained a 38% enhanced luminance of the OLED device and a decreased angular color change compared to a conventional OLED device.

Reliability Improvement in Solution-Processed ZrO2 Dielectrics Due to Addition of H2O2.

In this study, we investigated the effects of hydrogen peroxide (H2O2) on solution-processed zirconium oxide (ZrO2) dielectric materials. The addition of H2O2 into ZrO2 dielectric showed a reduction in hysteresis capacitance-voltage characteristics (from 393 mV to 96 mV). This resulted in a reduction in border trap density (Nbt) of the ZrO2 film (ZrO2: 2.24 × 1011 cm-2, ZrO2 + H2O2: 3.96 × 1010 cm-2). In addition, use of H2O2 in the ZrO2 dielectric improved the interface quality. Specifically, the reduced number of trap sites improved the reliability of the device under a negative bias stress (NBS). The 350 °C annealed ZrO2 dielectric with H2O2 showed excellent leakage current properties (6.7 × 10-9 A/cm2 at gate voltage of -10 V). Based on these results, we fabricated IGZO/ZrO2 + H2O2 TFTs, which showed a high saturation mobility of 6.10 cm2/V · s and excellent switching properties. This study suggests that incorporation of H2O2 into ZrO2 effectively reduced oxygen vacancies through strong oxidation and minimized residual organics that cause impurities or structural defects, such as pores or pin holes, compared to a virgin ZrO2 film.

Incorporation of Si and Zr into Pure HfO2 and Its Effects on Dielectric Integrity.

Hafnium-silicate (HfSiO4, (HfO2)x(SiO2)1-x) and hafnium-zirconate (HfZrO4, (HfO2)x(ZrO2)1-x) films were employed as a gate dielectric to enhance the electrical properties of pure HfO2. (HfO2)x(SiO2)1-x and (HfO2)x(ZrO2)1-x films were formed onto p-Si substrates with varying degrees of Hf content x (x = 1, 0.9, 0.7, and 0.5) via solution processing. With regard to (HfO2)x(SiO2)1-x, the leakage current decreased from 1.94 × 10-8 to 4.29 × 10-9 A/cm2 at a gate voltage of VG = -1 V when the HfO2 content was reduced. These resulted from the reduction of leakage paths through the interface between HfSiO4 and Si substrate. Additionally, (HfO2)x(ZrO2)1-x exhibited the lowest interfacial trap density of 3.4 × 1011 cm-2 eV-1 for x = 0.5 due to a reduction in root mean square (RMS) roughness of the film from 6.0 to 4.2 nm. From the results, it was found that (HfO2)0.5(SiO2)0.5 demonstrated excellent oxide integrity in contact with Si substrates, whereas (HfO2)0.5(ZrO2)0.5 demonstrated an enhanced film morphology and maintained a high dielectric constant value. Finally, the HfZrO4/HfSiO4/Si structure revealed a gate oxide with enhanced integrity compared to pure HfO2-based devices.

Investigation of the Charge Balance in Green Phosphorescent Organic Light-Emitting Diodes by Controlling the Mixed Host Emission Layer.

In this paper, we investigated the use of a mixed host emission layer (MH-EML) in green phosphorescent organic light-emitting diodes (OLEDs). The hole transport type (p-type) material (4,4'-Bis(N-carbazolyl)-1,1'-biphenyl (CBP)) and electron transport type (N-type) material (2,2',2″-(1,3,5-Benzinetriyl)-tris(1-phenyl-1-H-benzimidazole) (TPBi)) were mixed with different ratios. The electrons were easily injected through the lowest unoccupied molecular orbital (LUMO) of TPBi in the mixed host system. Also, holes were confined in the EML because of the deep highest occupied molecular orbital (HOMO) level of TPBi (6.7 eV). These results indicate that excitons were formed effectively and the recombination zone became wider under a high electric field in MH-EML devices. For these reasons, the lifetime of the MH-OLED device was 1.36 times higher than that of a single host emission layer (SH-EML) device and showed a reduction in Joule heating. Finally, the external quantum efficiency (EQE) roll-off ratio from 1 mA/cm2 to 100 mA/cm2 in the optimized device (30.46%) was 18.12%p lower than that of the SH-EML (48.58%).

Optimization of the Solution-Based Indium-Zinc Oxide/Zinc-Tin Oxide Channel Layer for Thin-Film Transistors.

Double stacked indium-zinc oxide (IZO)/zinc-tin oxide (ZTO) active layers were employed in amorphous-oxide-semiconductor thin-film transistors (AOS TFTs). Channel layers of the TFTs were optimized by varying the molarity of ZTO back channel layers (0.05, 0.1, 0.2, 0.3 M) and the electrical properties of IZO/ZTO double stacked TFTs were compared to single IZO and ZTO TFTs with varying the molarity and molar ratio. On the basis of the results, IZO/ZTO (0.1 M) TFTs showed the excellent electrical properties of saturation mobility (13.6 cm2/V·s), on-off ratio (7×106), and subthreshold swing (0.223 V/decade) compared to ZTO (0.1 M) of 0.73 cm2/V · s, 1 × 107, 0.416 V/decade and IZO (0.04 M) of 0.10 cm2/V · s, 5 × 106, 0.60 V/decade, respectively. This may be attributed to diffusing Sn into front layer during annealing process. In addition, with varying molarity of ZTO back channel layer, from 0.1 M to 0.3 M ZTO back channel TFTs, electrical properties and positive bias stability deteriorated with increasing molarity of back channel layer because of increasing total trap states. On the other hand, 0.05 M ZTO back channel TFT had inferior electrical properties than that of 0.1 M ZTO back channel TFT. It was related to back channel effect because of having thin thickness of channel layer. Among these devices, 0.1 M ZTO back channel TFT had a lowest total trap density, outstanding electrical properties and stability. Therefore, we recommended IZO/ZTO (0.1 M) TFT as a promising channel structure for advanced display applications.