ABSTRACT
Vibration measurements pose specific experimental challenges to be faced. In particular, optical methods can be used to obtain full-field vibration information. In this scenario, stereo-camera systems can be developed to obtain 3D displacement measurements. As vibration frequency increases, the common approach is to reduce camera exposure time to avoid blurred images, which can lead to under-exposed images and data loss, as well as issues with the synchronization of the stereo pair. Both of these problems can be solved by using high-intensity light pulses, which can produce high-quality images and guarantee camera synchronization since data is saved by both cameras only during the short-time light pulse. To this extent, high-power Light-Emitting Diodes (LEDs) can be used, but even if the LED itself can have a fast response time, specific electronic drivers are needed to ensure the desired timing of the light pulse. In this paper, a circuit is specifically designed to achieve high-intensity short-time light pulses in the range of 1 µs. A prototype of the designed board was assembled and tested to check its capability to respect the specification. Three different measurement methods are proposed and validated to achieve short-time light pulse measurements: shunt voltage measurement, direct photodiode measurement with a low-cost sensor, and indirect pulse measurement through a low-frame-rate digital camera.
ABSTRACT
This work presented a comparison between two Voltage Controlled Oscillators (VCOs) designed in 65 nm CMOS technology. The first architecture based on a Ring Oscillator (RO) was designed using three Current Mode Logic (CML) stages connected in a loop, while the second one was based on an LC-tank resonator. This analysis aimed to choose a VCO architecture able to be integrated into a rad-hard Phase Locked Loop. It had to meet the requirements of the SpaceFibre protocol, which supports frequencies up to 6.25 GHz, for space applications. The full custom schematic and layout designs are shown, and Single Event Effect simulations results, performed with a double exponential current pulses generator, are presented in detail for both VCOs. Although the RO-VCO performances in terms of technology scaling and high-integration density were attractive, the simulations on the process variations demonstrated its inability to generate the target frequency in harsh operating conditions. Instead, the LC-VCO highlighted a lower influence through Process-Voltage-Temperature simulations on the oscillation frequency. Both architectures were biased with a supply voltage of 1.2 V. The achieved results for the second architecture analyzed were attractive to address the requirements of the new SpaceFibre aerospace standard.
ABSTRACT
The design of a Phase-Locked Loop (PLL) to generate the clock reference for the new Spacefibre standard is presented in this paper. Spacefibre has been recently released by the European Space Agency (ESA) and supports up to 6.25 Gbps for on-board satellite communications. Taking as a starting point a rad-hard 6.25 GHz Voltage Controlled Oscillator in 65 nm technology, this work presents the design of the key blocks for an integrated PLL: a Triple Modular Redundancy Phase/Frequency Detector, a Charge Pump, and a passive Loop Filter. The modeling activities carried out in an Advanced Design System have proven that the proposed PLL can be completely integrated on-chip, with a Loop Filter area consumption of only 6000 µm2 (considering the 65 nm technology). The design of active circuits has been carried out at the transistor level in a Cadence Virtuoso environment, implementing both system and layout rad-hard techniques, and different solutions are discussed in this paper. As a result, a compact (0.09 mm2), low power (10.24 mW), dead zone free and rad-hard PLL is obtained with a Phase Noise below -80 dBc/Hz @ 1 MHz. A preliminary block view and floor plan of the test chip is also proposed.
