Your browser doesn't support javascript.
loading
Show: 20 | 50 | 100
Results 1 - 2 de 2
Filter
Add more filters










Database
Language
Publication year range
1.
ACS Appl Mater Interfaces ; 11(20): 18571-18579, 2019 May 22.
Article in English | MEDLINE | ID: mdl-31017757

ABSTRACT

We herein demonstrate, for the first time, transparent, flexible, and large-area monolithic MoS2 transistors and logic gates. Each single transistor consists of only two components: a monolithic chemical vapor deposition-grown MoS2 and an ion gel. Additional electrode materials are not required. The uniqueness of the device configuration is attributed to two factors. One is that a MoS2 layer is a semiconductor, but it can be doped degenerately; monolithic MoS2 can thus serve as both the electrodes and the channel of a transistor via selective doping of the material at certain positions. The other is the use of an electrolyte gate dielectric that permits effective gating (<3 V) even from an electrode coplanar with the channel. The resulting monolithic MoS2 transistors yield excellent device performance, including a maximum mobility of 1.5 cm2/V s, an on-off ratio of 105, and a turn-on voltage of -0.69 V. This unique transistor architecture was successfully applied to various semiconductors such as ReS2 and indium-gallium-zinc oxide. Furthermore, the presented devices exhibit excellent mechanical, operational, and environmental stabilities. Fabrication of complex logic circuits (NOT, NAND, and NOR gates) by integration of the monolithic MoS2 transistors is demonstrated. Finally, the monolithic MoS2 transistor was connected to drive red, green, and blue light-emitting diode pixels, which yielded high luminance at a low voltage (<3 V). We believe that the unique architecture of the devices provides a facile way for low-cost, flexible, and high-performance two-dimensional electronics.

2.
Nano Lett ; 17(5): 2999-3005, 2017 05 10.
Article in English | MEDLINE | ID: mdl-28414455

ABSTRACT

We demonstrated the fabrication of large-area ReS2 transistors and logic gates composed of a chemical vapor deposition (CVD)-grown multilayer ReS2 semiconductor channel and graphene electrodes. Single-layer graphene was used as the source/drain and coplanar gate electrodes. An ion gel with an ultrahigh capacitance effectively gated the ReS2 channel at a low voltage, below 2 V, through a coplanar gate. The contact resistance of the ion gel-gated ReS2 transistors with graphene electrodes decreased dramatically compared with the SiO2-devices prepared with Cr electrodes. The resulting transistors exhibited good device performances, including a maximum electron mobility of 0.9 cm2/(V s) and an on/off current ratio exceeding 104. NMOS logic devices, such as NOT, NAND, and NOR gates, were assembled using the resulting transistors as a proof of concept demonstration of the applicability of the devices to complex logic circuits. The large-area synthesis of ReS2 semiconductors and graphene electrodes and their applications in logic devices open up new opportunities for realizing future flexible electronics based on 2D nanomaterials.

SELECTION OF CITATIONS
SEARCH DETAIL
...