SiGe quantum wells with oscillating Ge concentrations for quantum dot qubits.

Large-scale arrays of quantum-dot spin qubits in Si/SiGe quantum wells require large or tunable energy splittings of the valley states associated with degenerate conduction band minima. Existing proposals to deterministically enhance the valley splitting rely on sharp interfaces or modifications in the quantum well barriers that can be difficult to grow. Here, we propose and demonstrate a new heterostructure, the "Wiggle Well", whose key feature is Ge concentration oscillations inside the quantum well. Experimentally, we show that placing Ge in the quantum well does not significantly impact our ability to form and manipulate single-electron quantum dots. We further observe large and widely tunable valley splittings, from 54 to 239 µeV. Tight-binding calculations, and the tunability of the valley splitting, indicate that these results can mainly be attributed to random concentration fluctuations that are amplified by the presence of Ge alloy in the heterostructure, as opposed to a deterministic enhancement due to the concentration oscillations. Quantitative predictions for several other heterostructures point to the Wiggle Well as a robust method for reliably enhancing the valley splitting in future qubit devices.

How Valley-Orbit States in Silicon Quantum Dots Probe Quantum Well Interfaces.

The energies of valley-orbit states in silicon quantum dots are determined by an as yet poorly understood interplay between interface roughness, orbital confinement, and electron interactions. Here, we report measurements of one- and two-electron valley-orbit state energies as the dot potential is modified by changing gate voltages, and we calculate these same energies using full configuration interaction calculations. The results enable an understanding of the interplay between the physical contributions and enable a new probe of the quantum well interface.

Coherent Control and Spectroscopy of a Semiconductor Quantum Dot Wigner Molecule.

Semiconductor quantum dots containing more than one electron have found wide application in qubits, where they enable readout and enhance polarizability. However, coherent control in such dots has typically been restricted to only the lowest two levels, and such control in the strongly interacting regime has not been realized. Here we report quantum control of eight different transitions in a silicon-based quantum dot. We use qubit readout to perform spectroscopy, revealing a dense set of energy levels with characteristic spacing far smaller than the single-particle energy. By comparing with full configuration interaction calculations, we argue that the dense set of levels arises from Wigner-molecule physics.

Autotuning of double dot devices in situ with machine learning.

The current practice of manually tuning quantum dots (QDs) for qubit operation is a relatively time-consuming procedure that is inherently impractical for scaling up and applications. In this work, we report on the in situ implementation of a recently proposed autotuning protocol that combines machine learning (ML) with an optimization routine to navigate the parameter space. In particular, we show that a ML algorithm trained using exclusively simulated data to quantitatively classify the state of a double-QD device can be used to replace human heuristics in the tuning of gate voltages in real devices. We demonstrate active feedback of a functional double-dot device operated at millikelvin temperatures and discuss success rates as a function of the initial conditions and the device performance. Modifications to the training network, fitness function, and optimizer are discussed as a path toward further improvement in the success rate when starting both near and far detuned from the target double-dot range.

Fabrication process and failure analysis for robust quantum dots in silicon.

We present an improved fabrication process for overlapping aluminum gate quantum dot devices on Si/SiGe heterostructures that incorporates low-temperature inter-gate oxidation, thermal annealing of gate oxide, on-chip electrostatic discharge (ESD) protection and an optimized interconnect process for thermal budget considerations. This process reduces gate-to-gate leakage, damage from ESD, dewetting of aluminum and formation of undesired alloys in device interconnects. Additionally, cross-sectional scanning transmission electron microscopy (STEM) images elucidate gate electrode morphology in the active region as device geometry is varied. We show that overlapping aluminum gate layers homogeneously conform to the topology beneath them, independent of gate geometry and identify critical dimensions in the gate geometry where pattern transfer becomes non-ideal, causing device failure.