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1.
ACS Nano ; 14(1): 985-992, 2020 Jan 28.
Article in English | MEDLINE | ID: mdl-31904930

ABSTRACT

The most pressing barrier for the development of advanced electronics based on two-dimensional (2D) layered semiconductors stems from the lack of site-selective synthesis of complementary n- and p-channels with low contact resistance. Here, we report an in-plane epitaxial route for the growth of interlaced 2D semiconductor monolayers using chemical vapor deposition with a gas-confined scheme, in which patterned graphene (Gr) serves as a guiding template for site-selective growth of Gr-WS2-Gr and Gr-WSe2-Gr heterostructures. The Gr/2D semiconductor interface exhibits a transparent contact with a nearly ideal pinning factor of 0.95 for the n-channel WS2 and 0.92 for the p-channel WSe2. The effective depinning of the Fermi level gives an ultralow contact resistance of 0.75 and 1.20 kΩ·µm for WS2 and WSe2, respectively. Integrated logic circuits including inverter, NAND gate, static random access memory, and five-stage ring oscillator are constructed using the complementary Gr-WS2-Gr-WSe2-Gr heterojunctions as a fundamental building block, featuring the prominent performance metrics of high operation frequency (>0.2 GHz), low-power consumption, large noise margins, and high operational stability. The technology presented here provides a speculative look at the electronic circuitry built on atomic-scale semiconductors in the near future.

2.
ACS Appl Mater Interfaces ; 9(41): 36181-36188, 2017 Oct 18.
Article in English | MEDLINE | ID: mdl-28945069

ABSTRACT

Atomically thin two-dimensional (2D) materials have attracted increasing attention for optoelectronic applications in view of their compact, ultrathin, flexible, and superior photosensing characteristics. Yet, scalable growth of 2D heterostructures and the fabrication of integrable optoelectronic devices remain unaddressed. Here, we show a scalable formation of 2D stacks and the fabrication of phototransistor arrays, with each photosensing element made of a graphene-WS2 vertical heterojunction and individually addressable by a local top gate. The constituent layers in the heterojunction are grown using chemical vapor deposition in combination with sulfurization, providing a clean junction interface and processing scalability. The aluminum top gate possesses a self-limiting oxide around the gate structure, allowing for a self-aligned deposition of drain/source contacts to reduce the access (ungated) channel regions and to boost the device performance. The generated photocurrent, inherently restricted by the limited optical absorption cross section of 2D materials, can be enhanced by 2 orders of magnitude by top gating. The resulting photoresponsivity can reach 4.0 A/W under an illumination power density of 0.5 mW/cm2, and the dark current can be minimized to few picoamperes, yielding a low noise-equivalent power of 2.5 × 10-16 W/Hz1/2. Tailoring 2D heterostacks as well as the device architecture moves the applications of 2D-based optoelectronic devices one big step forward.

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