Hardware Design for Autonomous Bayesian Networks.

Directed acyclic graphs or Bayesian networks that are popular in many AI-related sectors for probabilistic inference and causal reasoning can be mapped to probabilistic circuits built out of probabilistic bits (p-bits), analogous to binary stochastic neurons of stochastic artificial neural networks. In order to satisfy standard statistical results, individual p-bits not only need to be updated sequentially but also in order from the parent to the child nodes, necessitating the use of sequencers in software implementations. In this article, we first use SPICE simulations to show that an autonomous hardware Bayesian network can operate correctly without any clocks or sequencers, but only if the individual p-bits are appropriately designed. We then present a simple behavioral model of the autonomous hardware illustrating the essential characteristics needed for correct sequencer-free operation. This model is also benchmarked against SPICE simulations and can be used to simulate large-scale networks. Our results could be useful in the design of hardware accelerators that use energy-efficient building blocks suited for low-level implementations of Bayesian networks. The autonomous massively parallel operation of our proposed stochastic hardware has biological relevance since neural dynamics in brain is also stochastic and autonomous by nature.

Hardware implementation of Bayesian network building blocks with stochastic spintronic devices.

Bayesian networks are powerful statistical models to understand causal relationships in real-world probabilistic problems such as diagnosis, forecasting, computer vision, etc. For systems that involve complex causal dependencies among many variables, the complexity of the associated Bayesian networks become computationally intractable. As a result, direct hardware implementation of these networks is one promising approach to reducing power consumption and execution time. However, the few hardware implementations of Bayesian networks presented in literature rely on deterministic CMOS devices that are not efficient in representing the stochastic variables in a Bayesian network that encode the probability of occurrence of the associated event. This work presents an experimental demonstration of a Bayesian network building block implemented with inherently stochastic spintronic devices based on the natural physics of nanomagnets. These devices are based on nanomagnets with perpendicular magnetic anisotropy, initialized to their hard axes by the spin orbit torque from a heavy metal under-layer utilizing the giant spin Hall effect, enabling stochastic behavior. We construct an electrically interconnected network of two stochastic devices and manipulate the correlations between their states by changing connection weights and biases. By mapping given conditional probability tables to the circuit hardware, we demonstrate that any two node Bayesian networks can be implemented by our stochastic network. We then present the stochastic simulation of an example case of a four node Bayesian network using our proposed device, with parameters taken from the experiment. We view this work as a first step towards the large scale hardware implementation of Bayesian networks.

Probabilistic Circuits for Autonomous Learning: A Simulation Study.

Modern machine learning is based on powerful algorithms running on digital computing platforms and there is great interest in accelerating the learning process and making it more energy efficient. In this paper we present a fully autonomous probabilistic circuit for fast and efficient learning that makes no use of digital computing. Specifically we use SPICE simulations to demonstrate a clockless autonomous circuit where the required synaptic weights are read out in the form of analog voltages. This allows us to demonstrate a circuit that can be built with existing technology to emulate the Boltzmann machine learning algorithm based on gradient optimization of the maximum likelihood function. Such autonomous circuits could be particularly of interest as standalone learning devices in the context of mobile and edge computing.

Spin-torque devices with hard axis initialization as Stochastic Binary Neurons.

Employing the probabilistic nature of unstable nano-magnet switching has recently emerged as a path towards unconventional computational systems such as neuromorphic or Bayesian networks. In this letter, we demonstrate proof-of-concept stochastic binary operation using hard axis initialization of nano-magnets and control of their output state probability (activation function) by means of input currents. Our method provides a natural path towards addition of weighted inputs from various sources, mimicking the integration function of neurons. In our experiment, spin orbit torque (SOT) is employed to "drive" nano-magnets with perpendicular magnetic anisotropy (PMA) -to their metastable state, i.e. in-plane hard axis. Next, the probability of relaxing into one magnetization state (+mi) or the other (-mi) is controlled using an Oersted field generated by an electrically isolated current loop, which acts as a "charge" input to the device. The final state of the magnet is read out by the anomalous Hall effect (AHE), demonstrating that the magnetization can be probabilistically manipulated and output through charge currents, closing the loop from charge-to-spin and spin-to-charge conversion. Based on these building blocks, a two-node directed network is successfully demonstrated where the status of the second node is determined by the probabilistic output of the previous node and a weighted connection between them. We have also studied the effects of various magnetic properties, such as magnet size and anisotropic field on the stochastic operation of individual devices through Monte Carlo simulations of Landau Lifshitz Gilbert (LLG) equation. The three-terminal stochastic devices demonstrated here are a critical step towards building energy efficient spin based neural networks and show the potential for a new application space.