Aligned Carbon Nanotube Synaptic Transistors for Large-Scale Neuromorphic Computing.

This paper presents aligned carbon nanotube (CNT) synaptic transistors for large-scale neuromorphic computing systems. The synaptic behavior of these devices is achieved via charge-trapping effects, commonly observed in carbon-based nanoelectronics. In this work, charge trapping in the high- k dielectric layer of top-gated CNT field-effect transistors (FETs) enables the gradual analog programmability of the CNT channel conductance with a large dynamic range ( i. e., large on/off ratio). Aligned CNT synaptic devices present significant improvements over conventional memristor technologies ( e. g., RRAM), which suffer from abrupt transitions in the conductance modulation and/or a small dynamic range. Here, we demonstrate exceptional uniformity of aligned CNT FET synaptic behavior, as well as significant robustness and nonvolatility via pulsed experiments, establishing their suitability for neural network implementations. Additionally, this technology is based on a wafer-level technique for constructing highly aligned arrays of CNTs with high semiconducting purity and is fully CMOS compatible, ensuring the practicality of large-scale CNT+CMOS neuromorphic systems. We also demonstrate fine-tunability of the aligned CNT synaptic behavior and discuss its application to adaptive online learning schemes and to homeostatic regulation of artificial neuron firing rates. We simulate the implementation of unsupervised learning for pattern recognition using a spike-timing-dependent-plasticity scheme, indicate system-level performance (as indicated by the recognition accuracy), and demonstrate improvements in the learning rate resulting from tuning the synaptic characteristics of aligned CNT devices.

Engineering evidence for carbon monoxide toxicity cases.

Unintentional carbon monoxide poisonings and fatalities lead to many toxicity cases. Given the unusual physical properties of carbon monoxide-in that the gas is odorless and invisible-unorganized and erroneous methods in obtaining engineering evidence as required during the discovery process often occurs. Such evidence gathering spans domains that include building construction, appliance installation, industrial hygiene, mechanical engineering, combustion and physics. In this paper, we attempt to place a systematic framework that is relevant to key aspects in engineering evidence gathering for unintentional carbon monoxide poisoning cases. Such a framework aims to increase awareness of this process and relevant issues to help guide legal counsel and expert witnesses.

Self-aligned T-gate high-purity semiconducting carbon nanotube RF transistors operated in quasi-ballistic transport and quantum capacitance regime.

Carbon nanotube RF transistors are predicted to offer good performance and high linearity when operated in the ballistic transport and quantum capacitance regime; however, realization of such transistors has been very challenging. In this paper, we introduce a self-aligned fabrication method for carbon nanotube RF transistors, which incorporate a T-shaped (mushroom-shaped) aluminum gate, with oxidized aluminum as the gate dielectric. In this way, the channel length can be scaled down to 140 nm, which enables quasi-ballistic transport, and the gate dielectric is reduced to 2-3 nm aluminum oxide, leading to quasi-quantum capacitance operation. A current-gain cutoff frequency (f(t)) up to 23 GHz and a maximum oscillation frequency (f(max)) of 10 GHz are demonstrated. Furthermore, the linearity properties of nanotube transistors are characterized by using the 1 dB compression point measurement with positive power gain for the first time, to our knowledge. Our work reveals the importance and potential of separated semiconducting nanotubes for various RF applications.

High-power coherent microwave emission from magnetic tunnel junction nano-oscillators with perpendicular anisotropy.

The excitation of the steady-state precessions of magnetization opens a new way for nanoscale microwave oscillators by exploiting the transfer of spin angular momentum from a spin-polarized current to a ferromagnet, referred to as spin-transfer nano-oscillators (STNOs). For STNOs to be practical, however, their relatively low output power and their relatively large line width must be improved. Here we demonstrate that microwave signals with maximum measured power of 0.28 µW and simultaneously narrow line width of 25 MHz can be generated from CoFeB-MgO-based magnetic tunnel junctions having an in-plane magnetized reference layer and a free layer with strong perpendicular anisotropy. Moreover, the generation efficiency is substantially higher than previously reported STNOs. The results will be of importance for the design of nanoscale alternatives to traditional silicon oscillators used in radio frequency integrated circuits.

Fully printed separated carbon nanotube thin film transistor circuits and its application in organic light emitting diode control.

The advantages of printed electronics and semiconducting single-walled carbon nanotubes (SWCNTs) are combined for the first time for display electronics. Conductive silver ink and 98% semiconductive SWCNT solutions are used to print back-gated thin film transistors with high mobility, high on/off ratio, and high current carrying capacity. In addition, with printed polyethylenimine with LiClO4 as the gating material, fully printed top-gated devices have been made to work as excellent current switches for organic light emitting diodes (OLEDs). An OLED driving circuit composed of two top-gated fully printed transistors has been fabricated, and the successful control over external OLED is demonstrated. Our work demonstrates the significant potential of using printed carbon nanotube electronics for display backplane applications.

A stacked memory device on logic 3D technology for ultra-high-density data storage.

We have demonstrated, for the first time, a novel three-dimensional (3D) memory chip architecture of stacked-memory-devices-on-logic (SMOL) achieving up to 95% of cell-area efficiency by directly building up memory devices on top of front-end CMOS devices. In order to realize the SMOL, a unique 3D Flash memory device and vertical integration structure have been successfully developed. The SMOL architecture has great potential to achieve tera-bit level memory density by stacking memory devices vertically and maximizing cell-area efficiency. Furthermore, various emerging devices could replace the 3D memory device to develop new 3D chip architectures.

Radio frequency and linearity performance of transistors using high-purity semiconducting carbon nanotubes.

This paper reports the radio frequency (RF) and linearity performance of transistors using high-purity semiconducting carbon nanotubes. High-density, uniform semiconducting nanotube networks are deposited at wafer scale using our APTES-assisted nanotube deposition technique, and RF transistors with channel lengths down to 500 nm are fabricated. We report on transistors exhibiting a cutoff frequency (f(t)) of 5 GHz and with maximum oscillation frequency (f(max)) of 1.5 GHz. Besides the cutoff frequency, the other important figure of merit for the RF transistors is the device linearity. For the first time, we report carbon nanotube RF transistor linearity metrics up to 1 GHz. Without the use of active probes to provide the high impedance termination, the measurement bandwidth is therefore not limited, and the linearity measurements can be conducted at the frequencies where the transistors are intended to be operating. We conclude that semiconducting nanotube-based transistors are potentially promising building blocks for highly linear RF electronics and circuit applications.

Synthesis of nanometre-thick MoO3 sheets.

The formation of MoO(3) sheets of nanoscale thickness is described. They are made from several fundamental sheets of orthorhombic alpha-MoO(3), which can be processed in large quantities via a low cost synthesis route that combines thermal evaporation and mechanical exfoliation. These fundamental sheets consist of double-layers of linked distorted MoO(6) octahedra. Atomic force microscopy (AFM) measurements show that the minimum resolvable thickness of these sheets is 1.4 nm which is equivalent to the thickness of two double-layers within one unit cell of the alpha-MoO(3) crystal.

Patterning and templating for nanoelectronics.

The semiconductor industry will soon be launching 32 nm complementary metal oxide semiconductor (CMOS) technology node using 193 nm lithography patterning technology to fabricate microprocessors with more than 2 billion transistors. To ensure the survival of Moore's law, alternative patterning techniques that offer advantages beyond conventional top-down patterning are aggressively being explored. It is evident that most alternative patterning techniques may not offer compelling advantages to succeed conventional top-down lithography for silicon integrated circuits, but alternative approaches may well indeed offer functional advantages in realising next-generation information processing nanoarchitectures such as those based on cellular, bioinsipired, magnetic dot logic, and crossbar schemes. This paper highlights and evaluates some patterning methods from the Center on Functional Engineered Nano Architectonics in Los Angeles and discusses key benchmarking criteria with respect to CMOS scaling.

Feasibility study of logic circuits with a spin wave bus.

We present a feasibility study of logic circuits utilizing spin waves for information transmission and processing. As an alternative approach to the transistor-based architecture, logic circuits with a spin wave bus do not use charge as an information carrier. In this work we describe the general concept of logic circuits with a spin wave bus and illustrate its performance by numerical simulations based on available experimental data. Theoretical estimates and results of numerical simulations on signal attenuation, signal phase velocity, and the minimum spin wave energy required per bit in the spin bus are obtained. The transport parameters are compared with ones for conventional electronic transmission lines. The spin wave bus is not intended to substitute traditional metal interconnects since it has higher signal attenuation and lower signal propagation speed. The potential value of a spin wave bus is, however, an interface between electronic circuits and integrated spintronics circuits. The logic circuits with a spin wave bus allow us to provide wireless read-in and read-out.