Novel Mixed-Dimensional hBN-Passivated Silicon Nanowire Reconfigurable Field Effect Transistors: Fabrication and Characterization.

This work demonstrates the novel concept of a mixed-dimensional reconfigurable field effect transistor (RFET) by combining a one-dimensional (1D) channel material such as a silicon (Si) nanowire with a two-dimensional (2D) material as a gate dielectric. An RFET is an innovative device that can be dynamically programmed to perform as either an n- or p-FET by applying appropriate gate potentials. In this work, an insulating 2D material, hexagonal boron nitride (hBN), is introduced as a gate dielectric and encapsulation layer around the nanowire in place of a thermally grown or atomic-layer-deposited oxide. hBN flake was mechanically exfoliated and transferred onto a silicon nanowire-based RFET device using the dry viscoelastic stamping transfer technique. The thickness of the hBN flakes was investigated by atomic force microscopy and transmission electron microscopy. The ambipolar transfer characteristics of the Si-hBN RFETs with different gating architectures showed a significant improvement in the device's electrical parameters due to the encapsulation and passivation of the nanowire with the hBN flake. Both n- and p-type characteristics measured through the top gate exhibited a reduction of hysteresis by 10-20 V and an increase in the on-off ratio (ION/IOFF) by 1 order of magnitude (up to 108) compared to the values measured for unpassivated nanowire. Specifically, the hBN encapsulation provided improved electrostatic top gate coupling, which is reflected in the enhanced subthreshold swing values of the devices. For a single nanowire, an improvement up to 0.97 and 0.5 V/dec in the n- and p-conduction, respectively, is observed. Due to their dynamic switching and polarity control, RFETs boast great potential in reducing the device count, lowering power consumption, and playing a crucial role in advanced electronic circuitry. The concept of mixed-dimensional RFET could further strengthen its functionality, opening up new pathways for future electronics.

Mid- and far-infrared localized surface plasmon resonances in chalcogen-hyperdoped silicon.

Plasmonic sensing in the infrared region employs the direct interaction of the vibrational fingerprints of molecules with the plasmonic resonances, creating surface-enhanced sensing platforms that are superior to traditional spectroscopy. However, the standard noble metals used for plasmonic resonances suffer from high radiative losses as well as fabrication challenges, such as tuning the spectral resonance positions into mid- to far-infrared regions, and the compatibility issue with the existing complementary metal-oxide-semiconductor (CMOS) manufacturing platform. Here, we demonstrate the occurrence of mid-infrared localized surface plasmon resonances (LSPR) in thin Si films hyperdoped with the known deep-level impurity tellurium. We show that the mid-infrared LSPR can be further enhanced and spectrally extended to the far-infrared range by fabricating two-dimensional arrays of micrometer-sized antennas in a Te-hyperdoped Si chip. Since Te-hyperdoped Si can also work as an infrared photodetector, we believe that our results will unlock the route toward the direct integration of plasmonic sensors with the on-chip CMOS platform, greatly advancing the possibility of mass manufacturing of high-performance plasmonic sensing systems.

Controlled Silicidation of Silicon Nanowires Using Flash Lamp Annealing.

Among other new device concepts, nickel silicide (NiSix)-based Schottky barrier nanowire transistors are projected to supplement down-scaling of the complementary metal-oxide semiconductor (CMOS) technology as its physical limits are reached. Control over the NiSix phase and its intrusions into the nanowire is essential for superior performance and down-scaling of these devices. Several works have shown control over the phase, but control over the intrusion lengths has remained a challenge. To overcome this, we report a novel millisecond-range flash lamp annealing (FLA)-based silicidation process. Nanowires are fabricated on silicon-on-insulator substrates using a top-down approach. Subsequently, Ni silicidation experiments are carried out using FLA. It is demonstrated that this silicidation process gives unprecedented control over the silicide intrusions. Scanning electron microscopy and high-resolution transmission electron microscopy are performed for structural characterization of the silicide. FLA temperatures are estimated with the help of simulations.

Electrical Characterization of Germanium Nanowires Using a Symmetric Hall Bar Configuration: Size and Shape Dependence.

The fabrication of individual nanowire-based devices and their comprehensive electrical characterization remains a major challenge. Here, we present a symmetric Hall bar configuration for highly p-type germanium nanowires (GeNWs), fabricated by a top-down approach using electron beam lithography and inductively coupled plasma reactive ion etching. The configuration allows two equivalent measurement sets to check the homogeneity of GeNWs in terms of resistivity and the Hall coefficient. The highest Hall mobility and carrier concentration of GeNWs at 5 K were in the order of 100 cm2/(Vs) and 4×1019cm-3, respectively. With a decreasing nanowire width, the resistivity increases and the carrier concentration decreases, which is attributed to carrier scattering in the region near the surface. By comparing the measured data with simulations, one can conclude the existence of a depletion region, which decreases the effective cross-section of GeNWs. Moreover, the resistivity of thin GeNWs is strongly influenced by the cross-sectional shape.

Detection of ultra-low protein concentrations with the simplest possible field effect transistor.

Silicon nanowire (Si NW) sensors have attracted great attention due to their ability to provide fast, low-cost, label-free, real-time detection of chemical and biological species. Usually configured as field effect transistors (FETs), they have already demonstrated remarkable sensitivity with high selectivity (through appropriate functionalisation) towards a large number of analytes in both liquid and gas phases. Despite these excellent results, Si NW FET sensors have not yet been successfully employed to detect single molecules of either a chemical or biological target species. Here we show that sensors based on silicon junctionless nanowire transistors (JNTs), the simplest possible transistors, are capable of detecting the protein streptavidin at a concentration as low as 580 zM closely approaching the single molecule level. This ultrahigh detection sensitivity is due to the intrinsic advantages of junctionless devices over conventional FETs. Apart from their superior functionality, JNTs are much easier to fabricate by standard microelectronic processes than transistors containing p-n junctions. The ability of JNT sensors to detect ultra-low concentrations (in the zeptomolar range) of target species, and their potential for low-cost mass production, will permit their deployment in numerous environments, including life sciences, biotechnology, medicine, pharmacology, product safety, environmental monitoring and security.

Fabrication of Si and Ge nanoarrays through graphoepitaxial directed hardmask block copolymer self-assembly.

Films of self assembled diblock copolymers (BCPs) have attracted significant attention for generating semiconductor nanoarrays of sizes below 100 nm through a simple low cost approach for device fabrication. A challenging abstract is controlling microdomain orientation and ordering dictated by complex interplay of surface energies, polymer-solvent interactions and domain spacing. In context, microphase separated poly (styrene-b-ethylene oxide) (PS-b-PEO) thin films is illustrated to fabricate nanopatterns on silicon and germanium materials trenches. The trenched templates was produced by simple electron beam lithography using hydrogen silsesquioxane (HSQ) resist. The orientation of PEO, minority cylinder forming block, was controlled by controlling trench width and varying solvent annealing parameters viz. temperature, time etc. A noticeable difference in microdomain orientation was observed for Si and Ge trenches processed under same conditions. The Ge trenches promoted horizontal orientations compared to Si due to difference in surface properties without any prior surface treatments. This methodology allows to create Ge nanopatterns for device fabrication since native oxides on Ge often induce patterning challenges. Subsequently, a selective metal inclusion method was used to form hardmask nanoarrays to pattern transfer into those substrates through dry etching. The hardmask allows to create good fidelity, low line edge roughness (LER) materials nanopatterns.

Organo-arsenic molecular layers on silicon for high-density doping.

This article describes for the first time the controlled monolayer doping (MLD) of bulk and nanostructured crystalline silicon with As at concentrations approaching 2 × 10(20) atoms cm(-3). Characterization of doped structures after the MLD process confirmed that they remained defect- and damage-free, with no indication of increased roughness or a change in morphology. Electrical characterization of the doped substrates and nanowire test structures allowed determination of resistivity, sheet resistance, and active doping levels. Extremely high As-doped Si substrates and nanowire devices could be obtained and controlled using specific capping and annealing steps. Significantly, the As-doped nanowires exhibited resistances several orders of magnitude lower than the predoped materials.

Aligned silicon nanofins via the directed self-assembly of PS-b-P4VP block copolymer and metal oxide enhanced pattern transfer.

'Directing' block copolymer (BCP) patterns is a possible option for future semiconductor device patterning, but pattern transfer of BCP masks is somewhat hindered by the inherently low etch contrast between blocks. Here, we demonstrate a 'fab' friendly methodology for forming well-registered and aligned silicon (Si) nanofins following pattern transfer of robust metal oxide nanowire masks through the directed self-assembly (DSA) of BCPs. A cylindrical forming poly(styrene)-block-poly(4-vinyl-pyridine) (PS-b-P4VP) BCP was employed producing 'fingerprint' line patterns over macroscopic areas following solvent vapor annealing treatment. The directed assembly of PS-b-P4VP line patterns was enabled by electron-beam lithographically defined hydrogen silsequioxane (HSQ) gratings. We developed metal oxide nanowire features using PS-b-P4VP structures which facilitated high quality pattern transfer to the underlying Si substrate. This work highlights the precision at which long range ordered ∼10 nm Si nanofin features with 32 nm pitch can be defined using a cylindrical BCP system for nanolithography application. The results show promise for future nanocircuitry fabrication to access sub-16 nm critical dimensions using cylindrical systems as surface interfaces are easier to tailor than lamellar systems. Additionally, the work helps to demonstrate the extension of these methods to a 'high χ' BCP beyond the size limitations of the more well-studied PS-b-poly(methyl methylacrylate) (PS-b-PMMA) system.

Solvent vapor annealing of block copolymers in confined topographies: commensurability considerations for nanolithography.

The directed self-assembly of block copolymer (BCP) materials in topographically patterned substrates (i.e., graphoepitaxy) is a potential methodology for the continued scaling of nanoelectronic device technologies. In this Communication, an unusual feature size variation in BCP nanodomains under confinement with graphoepitaxially aligned cylinder-forming poly(styrene)-block-poly(4-vinylpyridine) (PS-b-P4VP) BCP is reported. Graphoepitaxy of PS-b-P4VP BCP line patterns (CII ) is accomplished via topo-graphy in hydrogen silsequioxane (HSQ) modified substrates and solvent vapor annealing (SVA). Interestingly, reduced domain sizes in features close to the HSQ guiding features are observed. The feature size reduction is evident after inclusion of alumina into the P4VP domains followed by pattern transfer to the silicon substrate. It is suggested that this nano-domain size perturbation is due to solvent swelling effects during SVA. It is proposed that using a commensurability value close to the solvent vapor annealed periodicity will alleviate this issue leading to uniform nanofins.