Sub-10 nm Silicon Nanopillar Fabrication Using Fast and Brushless Thermal Assembly of PS-b-PDMS Diblock Copolymer.

A new approach to obtaining spherical nanodomains using polystyrene-block-polydimethylsiloxane (PS-b-PDMS) is proposed. To reduce drastically the process time, we blended a copolymer with cylindrical morphology with a PS homopolymer. Adding PS homopolymer into a low-molar-mass cylindrical morphology PS-b-PDMS system drives it toward a spherical morphology. Besides, by controlling the as-spun state, spherical PDMS nanodomains could be kept and thermally arranged. This PS-homopolymer addition allows not only an efficient, purely thermal arrangement process of spheres but also the ability to work directly on nontreated silicon substrates. Indeed, as shown by STEM measurements, no PS brush surface treatment was necessary in our study to avoid a PDMS wetting layer at the interface with the Si substrate. Our approach was compared to a sphere-forming diblock copolymer, which needs a longer thermal annealing. Furthermore, GISAXS measurements provided complete information on PDMS sphere features. Excellent long-range order spherical microdomains were therefore produced on flat surfaces and inside graphoepitaxy trenches with a period of 21 nm, as were in-plane spheres with a diameter of 8 nm with a 15 min thermal annealing. Finally, direct plasma-etching transfer into the silicon substrate was demonstrated, and 20 nm high silicon nanopillars were obtained, which are very promising results for various nanopatterning applications.

Pulsed transfer etching of PS-PDMS block copolymers self-assembled in 193 nm lithography stacks.

This work presents the graphoepitaxy of high-χ block copolymers (BCP) in standard industry-like lithography stacks and their transfer into the silicon substrate The process includes conventional 193 nm photolithography, directed self-assembly of polystyrene-block-polydimethylsiloxane (PS-b-PDMS) and pulsed plasma etching to transfer the obtained features into the substrate. PS-b-PDMS has a high Flory-Huggins interaction parameter (high-χ) and is capable of achieving sub-10 nm feature sizes. The photolithography stack is fabricated on 300 mm diameter silicon wafers and is composed of three layers: spin-on-carbon (SoC), silicon-containing anti-reflective coating (SiARC) and 193 nm photolithography resist. Sixty-nanometer-deep trenches are first patterned by plasma etching in the SiARC/SoC stack using the resist mask. The PS-b-PDMS is then spread on the substrate surface. Directed self-assembly (DSA) of the BCP is induced by a solvent vapor annealing process and PDMS cylinders parallel to the substrate surface are obtained. The surface chemistry based on SoC permits an efficient etching process into the underlying silicon substrate. The etching process is performed under dedicated pulsed plasma etching conditions. Fifteen nanometer half-pitch dense line/space features are obtained with a height up to 90 nm.