ABSTRACT
An efficient design method for a compact and ultra-wideband multi-stage Wilkinson power divider in a parallel stripline (PSL) is proposed. To enhance the frequency bandwidth of the proposed power divider while reducing its size, the isolation branch is modified; that is, two capacitors are connected to both sides of a resistor at each isolation branch. For an efficient design process, the PSL power divider is equivalently represented by two microstrip power dividers, and the design equations are derived. Based on the design equations, an in-house algorithm is utilized to optimally determine the design parameters, including the line impedance, resistance, and capacitance of each stage. For example, a three-stage PSL power divider is designed with three λ/4 transmission lines at a base frequency of 5 GHz. To verify the accuracy of the design procedure, 3D EM simulations and measurements are performed, and the results show good agreement. Compared with the conventional three-stage Wilkinson power divider, the proposed PSL power divider achieves a wider frequency bandwidth of 1.16 to 6.51 GHz (139.5%) and a 23% shorter transmission line length of 207°, while exhibiting an insertion loss of 0.7 to 1.4 dB.
