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1.
Risk Manag Healthc Policy ; 15: 1917-1929, 2022.
Article in English | MEDLINE | ID: mdl-36268181

ABSTRACT

Background: COVID-19 has brought greater workload pressures to the medical field, such as medical staff being required to wear personal protective equipment (PPE). While PPE can protect the safety of staff during the pandemic, it can also accelerate the accumulation of fatigue among operators. Objective: This study explores the influence of different protection states on the mental fatigue of nurses. Methods: In this study, 10 participants (5 males and 5 females) were randomly selected among applicants to monitor mental fatigue during the nurses' daily work in four different PPE states (low temperature and low protection; low temperature and high protection; high temperature and low protection; high temperature and high protection). The NASA subjective mental fatigue scale was used for subjective evaluation. Reaction time, attention concentration, attention distribution, memory, and main task completion time were used for objective evaluation. Results: The results demonstrated a significant difference in the effects of different protection states on mental fatigue. The state of high temperature and high protection had the greatest influence on mental fatigue, the state of low temperature and low protection had the least, and states of high (low) temperature and low (high) protection had intermediate effects on mental fatigue. Furthermore, the correlation between the subjective and objective fatigue indices was analyzed using a multiple regression model. Conclusion: This study clarified the influence of different protection states on the mental fatigue of nurses, and verified that nurses require more time and energy to complete the same work as before under high protection states. It provides a basis for evaluating the mental fatigue of nurses in the unique period of the COVID-19 pandemic and specific ideas for optimizing the nursing process.

2.
Sci Rep ; 12(1): 12179, 2022 07 16.
Article in English | MEDLINE | ID: mdl-35842515

ABSTRACT

The purpose of this study was to develop and evaluate the performance of deep learning methods based on convolutional neural networks (CNN) to detect and identify specific hip arthroplasty models. In this study, we propose a novel deep learning-based approach to identify hip arthroplasty implants' design using anterior-posterior images of both the stem and the cup. We harness the pre-trained ResNet50 CNN model and employ transfer learning methods to adapt the model for the implants identification task using a total of 714 radiographs of 4 different hip arthroplasty implant designs. Performance was compared with the operative notes and crosschecked with implant sheets. We also evaluate the difference in performance of models trained with the images of the stem, the cup or both. The training and validation data sets were comprised of 357 stem images and 357 cup radiographs across 313 patients and included 4 hip arthroplasty implants from 4 leading implant manufacturers. After 1000 training epochs the model classified 4 implant models with very high accuracy. Our results showed that jointly using stem images and cup images did not improve the classification accuracy of the CNN model. CNN can accurately distinguish between specific hip arthroplasty designs. This technology could offer a useful adjunct to the surgeon in preoperative identification of the prior implant. Using stem images or cup images to train the CNN can both achieve effective identification accuracy, with the accuracy of the stem images being higher. Using stem images and cup images together is not more effective than using images from only one perspective.


Subject(s)
Arthroplasty, Replacement, Hip , Hip Prosthesis , Arthroplasty, Replacement, Hip/methods , Artificial Intelligence , Humans , Neural Networks, Computer , Radiography
3.
Nanoscale ; 12(12): 6644-6650, 2020 Mar 28.
Article in English | MEDLINE | ID: mdl-32186312

ABSTRACT

Strain engineering provides an efficient strategy to modulate the fundamental properties of semiconducting structures for use in functional electronic and optoelectronic devices. Here, we report on how the strain affects the bandgap, optical anisotropy and stability of two-dimensional (2D) perovskite (BA)2(MA)n-1PbnI3n+1 (n = 1-3) microplates, using photoluminescence spectroscopy. Upon applying external strain, the bandgap decreases at a rate of -5.60/-2.74/-1.38 meV per % for n = 1, 2, and 3 2D perovskites, respectively. This change of the bandgap can be ascribed to the distortion of the octahedra (Pb-I bond contraction) in 2D perovskites, supported by a study on emission anisotropy, which increases with the increase of strain. In addition, the external strain can significantly deteriorate the stability of 2D perovskites due to the strain induced distortion which would make the penetration of moisture and oxygen into the perovskite microplates easier, resulting in much faster degradation rates. Our findings not only provide insights into the design and optimization of functional devices, but also provide a new approach to improve the stability of 2D perovskite based devices.

4.
Sci Rep ; 6: 24433, 2016 Apr 13.
Article in English | MEDLINE | ID: mdl-27073154

ABSTRACT

The nanoscale chip-integrated all-optical logic parity checker is an essential core component for optical computing systems and ultrahigh-speed ultrawide-band information processing chips. Unfortunately, little experimental progress has been made in development of these devices to date because of material bottleneck limitations and a lack of effective realization mechanisms. Here, we report a simple and efficient strategy for direct realization of nanoscale chip-integrated all-optical logic parity checkers in integrated plasmonic circuits in the optical communication range. The proposed parity checker consists of two-level cascaded exclusive-OR (XOR) logic gates that are realized based on the linear interference of surface plasmon polaritons propagating in the plasmonic waveguides. The parity of the number of logic 1s in the incident four-bit logic signals is determined, and the output signal is given the logic state 0 for even parity (and 1 for odd parity). Compared with previous reports, the overall device feature size is reduced by more than two orders of magnitude, while ultralow energy consumption is maintained. This work raises the possibility of realization of large-scale integrated information processing chips based on integrated plasmonic circuits, and also provides a way to overcome the intrinsic limitations of serious surface plasmon polariton losses for on-chip integration applications.

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