Enhanced Device Efficiency and Long-Term Stability via Boronic Acid-Based Self-Assembled Monolayer Modification of Indium Tin Oxide in a Planar Perovskite Solar Cell.

Interfacial engineering is essential for the development of highly efficient and stable solar cells through minimizing energetic losses at interfaces. Self-assembled monolayers (SAMs) have been shown as a handle to tune the work function (WF) of indium tin oxide (ITO), improving photovoltaic cell performance and device stability. In this study, we utilize a new class of boronic acid-based fluorine-terminated SAMs to modify ITO surfaces in planar perovskite solar cells. The SAM treatment demonstrates an increase of the WF of ITO, an enhancement of the short-circuit current, and a passivation of trap states at the ITO/[poly(3,4ethylenedioxylenethiophene):poly(styrenesulfonic acid)] interface. Device stability improves upon SAM modification, with efficiency decreasing only 20% after one month. Our work highlights a simple treatment route to achieve hysteresis-free, reproducible, stable, and highly efficient (16%) planar perovskite solar cells.

Phase Transition of Graphene-Templated Vertical Zinc Phthalocyanine Nanopillars.

We report on the graphene-assisted growth, crystallization, and phase transition of zinc phthalocyanine (ZnPc) vertically oriented single crystal nanopillars. Postcrystallization thermal annealing of the nanostructures results in a molecular packing change while maintaining the vertical orientation of the single crystals orthogonal to the underlying substrate. Grazing incidence X-ray diffraction and high-resolution TEM studies characterized this phase transition from a metastable crystal phase to the more stable ß-phase commonly observed in bulk crystals. These vertical arrays of crystalline nanopillars exhibit a high-surface-to-volume ratio, which is advantageous for applications such as gas sensors. We fabricated chemiresistor sensors with ZnPc nanopillars grown on graphene and demonstrated its selectivity for ammonia vapors, and improvement in sensitivity in the ß-phase crystal packing pillars due to their molecular orientation increasing the exposure of the Zn2+ ion to the ammonia analyte. This work highlights the first morphology-retentive phase transition in organic single crystal nanopillars through simple postprocessing thermal annealing. This study opens up the possibility of molecular packing control without large variations in morphology, a necessity for high-performance devices and establishing structure-property relations.

Direct Printing of Graphene Electrodes for High-Performance Organic Inverters.

Scalable fabrication of high-resolution electrodes and interconnects is necessary to enable advanced, high-performance, printed, and flexible electronics. Here, we demonstrate the direct printing of graphene patterns with feature widths from 300 µm to ∼310 nm by liquid-bridge-mediated nanotransfer molding. This solution-based technique enables residue-free printing of graphene patterns on a variety of substrates with surface energies between ∼43 and 73 mN m-1. Using printed graphene source and drain electrodes, high-performance organic field-effect transistors (OFETs) are fabricated with single-crystal rubrene (p-type) and fluorocarbon-substituted dicyanoperylene-3,4:9,10-bis(dicarboximide) (PDIF-CN2) (n-type) semiconductors. Measured mobilities range from 2.1 to 0.2 cm2 V-1 s-1 for rubrene and from 0.6 to 0.1 cm2 V-1 s-1 for PDIF-CN2. Complementary inverter circuits are fabricated from these single-crystal OFETs with gains as high as ∼50. Finally, these high-resolution graphene patterns are compatible with scalable processing, offering compelling opportunities for inexpensive printed electronics with increased performance and integration density.

Room-Temperature Routes Toward the Creation of Zinc Oxide Films from Molecular Precursors.

The fabrication of "flexible" electronics on plastic substrates with low melting points requires the development of thin-film deposition techniques that operate at low temperatures. This is easily achieved with vacuum- or solution-processed molecular or polymeric semiconductors, but oxide materials remain a significant challenge. Here, we show that zinc oxide (ZnO) can be prepared using only room-temperature processes, with the molecular thin-film precursor zinc phthalocyanine (ZnPc), followed by UV-light treatment in vacuum to elicit degradation of the organic components and transformation of the deposited film to the oxide material. The degradation mechanism was assessed by studying the influence of the atmosphere during the reaction: it was particularly sensitive to the oxygen pressure in the chamber and optimal degradation conditions were established as 3 mbar with 40% oxygen in nitrogen. The morphology of the film remained relatively unchanged during the reaction, but a detailed analysis of its composition using both scanning transmission electron microscopy and secondary ion mass spectrometry revealed that a 40 nm thick layer containing ZnO results from the 100 nm thick precursor after complete reaction. Our methodology represents a simple route for the fabrication of oxides and multilayer structures that can be easily integrated into current molecular thin-film growth setups, without the need for a high-temperature step.

Graphene Ink as a Conductive Templating Interlayer for Enhanced Charge Transport of C60-Based Devices.

We demonstrate conductive templating interlayers of graphene ink, integrating the electronic and chemical properties of graphene in a solution-based process relevant for scalable manufacturing. Thin films of graphene ink are coated onto ITO, following thermal annealing, to form a percolating network used as interlayer. We employ a benchmark n-type semiconductor, C60, to study the interface of the active layer/interlayer. On bare ITO, C60 molecules form films of homogeneously distributed grains; with a graphene interlayer, a preferential orientation of C60 molecules is observed in the individual graphene plates. This leads to crystal growth favoring enhanced charge transport. We fabricate devices to characterize the electron injection and the effect of graphene on the device performance. We observe a significant increase in the current density with the interlayer. Current densities as high as ∼1 mA/cm2 and ∼70 mA/cm2 are realized for C60 deposited with the substrate at 25 °C and 150 °C, respectively.