Dust-Sized High-Power-Density Photovoltaic Cells on Si and SOI Substrates for Wafer-Level-Packaged Small Edge Computers.

Advancement in microelectronics technology enables autonomous edge computing platforms in the size of a dust mote (<1 mm), bringing efficient and low-cost artificial intelligence close to the end user and Internet-of-Things (IoT) applications. The key challenge for these compact high-performance edge computers is the integration of a power source that satisfies the high-power-density requirement and does not increase the complexity and cost of the packaging. Here, it is shown that dust-sized III-V photovoltaic (PV) cells grown on Si and silicon-on-insulator (SOI) substrates can be integrated using a wafer-level-packaging process and achieve higher power density than all prior micro-PVs on Si and SOI substrates. The high-throughput heterogeneous integration unlocks the potential of large-scale manufacturing of these integrated systems with low cost for IoT applications. The negative effect of crystallographic defects in the heteroepitaxial materials on PV performance diminishes at high power density. Simultaneous power delivery and data transmission to the dust mote with heteroepitaxially grown PV are also demonstrated using hand-held illumination sources.

Carrier-resolved photo-Hall effect.

The fundamental parameters of majority and minority charge carriers-including their type, density and mobility-govern the performance of semiconductor devices yet can be difficult to measure. Although the Hall measurement technique is currently the standard for extracting the properties of majority carriers, those of minority carriers have typically only been accessible through the application of separate techniques. Here we demonstrate an extension to the classic Hall measurement-a carrier-resolved photo-Hall technique-that enables us to simultaneously obtain the mobility and concentration of both majority and minority carriers, as well as the recombination lifetime, diffusion length and recombination coefficient. This is enabled by advances in a.c.-field Hall measurement using a rotating parallel dipole line system and an equation, ΔµH = d(σ2H)/dσ, which relates the hole-electron Hall mobility difference (ΔµH), the conductivity (σ) and the Hall coefficient (H). We apply this technique to various solar absorbers-including high-performance lead-iodide-based perovskites-and demonstrate simultaneous access to majority and minority carrier parameters and map the results against varying light intensities. This information, which is buried within the photo-Hall measurement1,2, had remained inaccessible since the original discovery of the Hall effect in 18793. The simultaneous measurement of majority and minority carriers should have broad applications, including in photovoltaics and other optoelectronic devices.

Improving Carrier-Transport Properties of CZTS by Mg Incorporation with Spray Pyrolysis.

High nonradiative recombination, low diffusion length and band tailing are often associated with a large open circuit voltage deficit, which results in low efficiency of Cu2ZnSnS4 (CZTS) solar cells. Recently, cation substitution in CZTS has gained interest as a plausible solution to suppress these issues. However, the common substitutes, Ag and Cd, are not ideal due to their scarcity and toxicity. Other transition-metal candidates (e.g., Mn, Fe, Co, or Ni) are multivalent, which may form harmful deep-level defects. Magnesium, as one of the viable substitutes, does not have these issues, as it is very stable in +2 oxidation state, abundant, and nontoxic. In this study, we investigate the effect of Mg incorporation in sulfur-based Cu2ZnSnS4 to form Cu2MgxZn1-xSnS4 by varying x from 0.0 to 1.0. These films were fabricated by chemical spray pyrolysis and the subsequent sulfurization process. At a high Mg content, it is found that Mg does not replace Zn to form a quaternary compound, which leads to the appearance of the secondary phases in the sample. However, a low Mg content (Cu2Mg0.05Zn0.95SnS4) improves the power conversion efficiency from 5.10% (CZTS) to 6.73%. The improvement is correlated to the better carrier-transport properties, as shown by a lesser amount of the ZnS secondary phase, higher carrier mobility, and shallower acceptor defects level. In addition, the Cu2Mg0.05Zn0.95SnS4 device also shows better charge-collection property based on the higher fill factor and quantum efficiency despite having lower depletion width. Therefore, we believe that the addition of a small amount of Mg is another viable route to improve the performance of the CZTS solar cell.

Ultrathin high band gap solar cells with improved efficiencies from the world's oldest photovoltaic material.

Selenium was used in the first solid state solar cell in 1883 and gave early insights into the photoelectric effect that inspired Einstein's Nobel Prize work; however, the latest efficiency milestone of 5.0% was more than 30 years ago. The recent surge of interest towards high-band gap absorbers for tandem applications led us to reconsider this attractive 1.95 eV material. Here, we show completely redesigned selenium devices with improved back and front interfaces optimized through combinatorial studies and demonstrate record open-circuit voltage (V OC) of 970 mV and efficiency of 6.5% under 1 Sun. In addition, Se devices are air-stable, non-toxic, and extremely simple to fabricate. The absorber layer is only 100 nm thick, and can be processed at 200 ˚C, allowing temperature compatibility with most bottom substrates or sub-cells. We analyze device limitations and find significant potential for further improvement making selenium an attractive high-band-gap absorber for multi-junction device applications.Wide band gap semiconductors are important for the development of tandem photovoltaics. By introducing buffer layers at the front and rear side of solar cells based on selenium; Todorov et al., reduce interface recombination losses to achieve photoconversion efficiencies of 6.5%.

Earth-Abundant Chalcogenide Photovoltaic Devices with over 5% Efficiency Based on a Cu2 BaSn(S,Se)4 Absorber.

In recent years, Cu2 ZnSn(S,Se)4 (CZTSSe) materials have enabled important progress in associated thin-film photovoltaic (PV) technology, while avoiding scarce and/or toxic metals; however, cationic disorder and associated band tailing fundamentally limit device performance. Cu2 BaSnS4 (CBTS) has recently been proposed as a prospective alternative large bandgap (~2 eV), environmentally friendly PV material, with ~2% power conversion efficiency (PCE) already demonstrated in corresponding devices. In this study, a two-step process (i.e., precursor sputter deposition followed by successive sulfurization/selenization) yields high-quality nominally pinhole-free films with large (>1 µm) grains of selenium-incorporated (x = 3) Cu2 BaSnS4-x Sex (CBTSSe) for high-efficiency PV devices. By incorporating Se in the sulfide film, absorber layers with 1.55 eV bandgap, ideal for single-junction PV, have been achieved within the CBTSSe trigonal structural family. The abrupt transition in quantum efficiency data for wavelengths above the absorption edge, coupled with a strong sharp photoluminescence feature, confirms the relative absence of band tailing in CBTSSe compared to CZTSSe. For the first time, by combining bandgap tuning with an air-annealing step, a CBTSSe-based PV device with 5.2% PCE (total area 0.425 cm2 ) is reported, >2.5× better than the previous champion pure sulfide device. These results suggest substantial promise for the emerging Se-rich Cu2 BaSnS4-x Sex family for high-efficiency and earth-abundant PV.

High efficiency Cu2ZnSn(S,Se)4 solar cells by applying a double In2S3/CdS emitter.

High-efficiency Cu2ZnSn(S,Se)4 solar cells are reported by applying In2S3/CdS double emitters. This new structure offers a high doping concentration within the Cu2ZnSn(S,Se)4 solar cells, resulting in a substantial enhancement in open-circuit voltage. The 12.4% device is obtained with a record open-circuit voltage deficit of 593 mV.

Prospects and performance limitations for Cu-Zn-Sn-S-Se photovoltaic technology.

While cadmium telluride and copper-indium-gallium-sulfide-selenide (CIGSSe) solar cells have either already surpassed (for CdTe) or reached (for CIGSSe) the 1 GW yr⁻¹ production level, highlighting the promise of these rapidly growing thin-film technologies, reliance on the heavy metal cadmium and scarce elements indium and tellurium has prompted concern about scalability towards the terawatt level. Despite recent advances in structurally related copper-zinc-tin-sulfide-selenide (CZTSSe) absorbers, in which indium from CIGSSe is replaced with more plentiful and lower cost zinc and tin, there is still a sizeable performance gap between the kesterite CZTSSe and the more mature CdTe and CIGSSe technologies. This review will discuss recent progress in the CZTSSe field, especially focusing on a direct comparison with analogous higher performing CIGSSe to probe the performance bottlenecks in Earth-abundant kesterite devices. Key limitations in the current generation of CZTSSe devices include a shortfall in open circuit voltage relative to the absorber band gap and secondarily a high series resistance, which contributes to a lower device fill factor. Understanding and addressing these performance issues should yield closer performance parity between CZTSSe and CdTe/CIGSSe absorbers and hopefully facilitate a successful launch of commercialization for the kesterite-based technology.

Wire textured, multi-crystalline Si solar cells created using self-assembled masks.

We have developed an inexpensive and scalable method to create wire textures on multi-crystalline Si solar cell surfaces for enhanced light trapping. The wires are created by reactive ion etching, using a monolayer high self-assembled array of polymer microspheres as an etch mask. Chemical functionalization of the microspheres and the Si surface allows the mask to be assembled by simple dispensing, without spin or squeegee based techniques. Surface reflectivities of the resulting wire textured multi-crystalline solar cells were comparable to that of KOH etched single crystal Si (100). Electrically, the solar cells exhibited a 20% gain in the short circuit current compared to planar multicrystalline Si control devices, and a relative increase of 7-16% in the "pseudo" efficiencies when the series resistance contributions are extracted out.

Measurement of carrier mobility in silicon nanowires.

We report the first direct capacitance measurements of silicon nanowires (SiNWs) and the consequent determination of field carrier mobilities in undoped-channel SiNW field-effect transistors (FETs) at room temperature. We employ a two-FET method for accurate extraction of the intrinsic channel resistance and intrinsic channel capacitance of the SiNWs. The devices used in this study were fabricated using a top-down method to create SiNW FETs with up to 1000 wires in parallel for increasing the raw capacitance while maintaining excellent control on device dimensions and series resistance. We found that, compared with the universal mobility curves for bulk silicon, the electron and hole mobilities in nanowires are comparable to those of the surface orientation that offers a lower mobility.