Using machine learning with optical profilometry for GaN wafer screening.

To improve the manufacturing process of GaN wafers, inexpensive wafer screening techniques are required to both provide feedback to the manufacturing process and prevent fabrication on low quality or defective wafers, thus reducing costs resulting from wasted processing effort. Many of the wafer scale characterization techniques-including optical profilometry-produce difficult to interpret results, while models using classical programming techniques require laborious translation of the human-generated data interpretation methodology. Alternatively, machine learning techniques are effective at producing such models if sufficient data is available. For this research project, we fabricated over 6000 vertical PiN GaN diodes across 10 wafers. Using low resolution wafer scale optical profilometry data taken before fabrication, we successfully trained four different machine learning models. All models predict device pass and fail with 70-75% accuracy, and the wafer yield can be predicted within 15% error on the majority of wafers.

Optimizing performance and yield of vertical GaN diodes using wafer scale optical techniques.

To improve the manufacturing of vertical GaN devices for power electronics applications, the effects of defects in GaN substrates need to be better understood. Many non-destructive techniques including photoluminescence, Raman spectroscopy and optical profilometry, can be used to detect defects in the substrate and epitaxial layers. Raman spectroscopy was used to identify points of high crystal stress and non-uniform conductivity in a substrate, while optical profilometry was used to identify bumps and pits in a substrate which could cause catastrophic device failures. The effect of the defects was studied using vertical P-i-N diodes with a single zone junction termination extention (JTE) edge termination and isolation, which were formed via nitrogen implantation. Diodes were fabricated on and off of sample abnormalities to study their effects. From electrical measurements, it was discovered that the devices could consistently block voltages over 1000 V (near the theoretical value of the epitaxial layer design), and the forward bias behavior could consistently produce on-resistance below 2 mΩ cm2, which is an excellent value considering DC biasing was used and no substrate thinning was performed. It was found that high crystal stress increased the probability of device failure from 6 to 20%, while an inhomogeneous carrier concentration had little effect on reverse bias behavior, and slightly (~ 3%) increased the on-resistance (Ron). Optical profilometry was able to detect regions of high surface roughness, bumps, and pits; in which, the majority of the defects detected were benign. However a large bump in the termination region of the JTE or a deep pit can induce a low voltage catastrophic failure, and increased crystal stress detected by the Raman correlated to the optical profilometry with associated surface topography.

Fabrication and field emission properties of vertical, tapered GaN nanowires etched via phosphoric acid.

The controlled fabrication of vertical, tapered, and high-aspect ratio GaN nanowires via a two-step top-down process consisting of an inductively coupled plasma reactive ion etch followed by a hot, 85% H3PO4crystallographic wet etch is explored. The vertical nanowires are oriented in the[0001]direction and are bound by sidewalls comprising of{336¯2}semipolar planes which are at a 12° angle from the [0001] axis. High temperature H3PO4etching between 60 °C and 95 °C result in smooth semipolar faceting with no visible micro-faceting, whereas a 50 °C etch reveals a micro-faceted etch evolution. High-angle annular dark-field scanning transmission electron microscopy imaging confirms nanowire tip dimensions down to 8-12 nanometers. The activation energy associated with the etch process is 0.90 ± 0.09 eV, which is consistent with a reaction-rate limited dissolution process. The exposure of the{336¯2}type planes is consistent with etching barrier index calculations. The field emission properties of the nanowires were investigated via a nanoprobe in a scanning electron microscope as well as by a vacuum field emission electron microscope. The measurements show a gap size dependent turn-on voltage, with a maximum current of 33 nA and turn-on field of 1.92 V nm-1for a 50 nm gap, and uniform emission across the array.

Ultralow Voltage GaN Vacuum Nanodiodes in Air.

The III-nitride semiconductors have many attractive properties for field-emission vacuum electronics, including high thermal and chemical stability, low electron affinity, and high breakdown fields. Here, we report top-down fabricated gallium nitride (GaN)-based nanoscale vacuum electron diodes operable in air, with record ultralow turn-on voltages down to ∼0.24 V and stable high field-emission currents, tested up to several microamps for single-emitter devices. We leverage a scalable, top-down GaN nanofabrication method leading to damage-free and smooth surfaces. Gap-dependent and pressure-dependent studies provide new insights into the design of future, integrated nanogap vacuum electron devices. The results show promise for a new class of high-performance and robust, on-chip, III-nitride-based vacuum nanoelectronics operable in air or reduced vacuum.