Area-selective atomic layer deposition on 2D monolayer lateral superlattices.

The advanced patterning process is the basis of integration technology to realize the development of next-generation high-speed, low-power consumption devices. Recently, area-selective atomic layer deposition (AS-ALD), which allows the direct deposition of target materials on the desired area using a deposition barrier, has emerged as an alternative patterning process. However, the AS-ALD process remains challenging to use for the improvement of patterning resolution and selectivity. In this study, we report a superlattice-based AS-ALD (SAS-ALD) process using a two-dimensional (2D) MoS2-MoSe2 lateral superlattice as a pre-defining template. We achieved a minimum half pitch size of a sub-10 nm scale for the resulting AS-ALD on the 2D superlattice template by controlling the duration time of chemical vapor deposition (CVD) precursors. SAS-ALD introduces a mechanism that enables selectivity through the adsorption and diffusion processes of ALD precursors, distinctly different from conventional AS-ALD method. This technique facilitates selective deposition even on small pattern sizes and is compatible with the use of highly reactive precursors like trimethyl aluminum. Moreover, it allows for the selective deposition of a variety of materials, including Al2O3, HfO2, Ru, Te, and Sb2Se3.

Atomic Layer Deposition Route to Scalable, Electronic-Grade van der Waals Te Thin Films.

Scalable production and integration techniques for van der Waals (vdW) layered materials are vital for their implementation in next-generation nanoelectronics. Among available approaches, perhaps the most well-received is atomic layer deposition (ALD) due to its self-limiting layer-by-layer growth mode. However, ALD-grown vdW materials generally require high processing temperatures and/or additional postdeposition annealing steps for crystallization. Also, the collection of ALD-producible vdW materials is rather limited by the lack of a material-specific tailored process design. Here, we report the annealing-free wafer-scale growth of monoelemental vdW tellurium (Te) thin films using a rationally designed ALD process at temperatures as low as 50 °C. They exhibit exceptional homogeneity/crystallinity, precise layer controllability, and 100% step coverage, all of which are enabled by introducing a dual-function co-reactant and adopting a so-called repeating dosing technique. Electronically, vdW-coupled and mixed-dimensional vertical p-n heterojunctions with MoS2 and n-Si, respectively, are demonstrated with well-defined current rectification as well as spatial uniformity. Additionally, we showcase an ALD-Te-based threshold switching selector with fast switching time (∼40 ns), selectivity (∼104), and low Vth (∼1.3 V). This synthetic strategy allows the low-thermal-budget production of vdW semiconducting materials in a scalable fashion, thereby providing a promising approach for monolithic integration into arbitrary 3D device architectures.