Neuromorphic-P2M: processing-in-pixel-in-memory paradigm for neuromorphic image sensors.

Edge devices equipped with computer vision must deal with vast amounts of sensory data with limited computing resources. Hence, researchers have been exploring different energy-efficient solutions such as near-sensor, in-sensor, and in-pixel processing, bringing the computation closer to the sensor. In particular, in-pixel processing embeds the computation capabilities inside the pixel array and achieves high energy efficiency by generating low-level features instead of the raw data stream from CMOS image sensors. Many different in-pixel processing techniques and approaches have been demonstrated on conventional frame-based CMOS imagers; however, the processing-in-pixel approach for neuromorphic vision sensors has not been explored so far. In this work, for the first time, we propose an asynchronous non-von-Neumann analog processing-in-pixel paradigm to perform convolution operations by integrating in-situ multi-bit multi-channel convolution inside the pixel array performing analog multiply and accumulate (MAC) operations that consume significantly less energy than their digital MAC alternative. To make this approach viable, we incorporate the circuit's non-ideality, leakage, and process variations into a novel hardware-algorithm co-design framework that leverages extensive HSpice simulations of our proposed circuit using the GF22nm FD-SOI technology node. We verified our framework on state-of-the-art neuromorphic vision sensor datasets and show that our solution consumes ~2× lower backend-processor energy while maintaining almost similar front-end (sensor) energy on the IBM DVS128-Gesture dataset than the state-of-the-art while maintaining a high test accuracy of 88.36%.

A processing-in-pixel-in-memory paradigm for resource-constrained TinyML applications.

The demand to process vast amounts of data generated from state-of-the-art high resolution cameras has motivated novel energy-efficient on-device AI solutions. Visual data in such cameras are usually captured in analog voltages by a sensor pixel array, and then converted to the digital domain for subsequent AI processing using analog-to-digital converters (ADC). Recent research has tried to take advantage of massively parallel low-power analog/digital computing in the form of near- and in-sensor processing, in which the AI computation is performed partly in the periphery of the pixel array and partly in a separate on-board CPU/accelerator. Unfortunately, high-resolution input images still need to be streamed between the camera and the AI processing unit, frame by frame, causing energy, bandwidth, and security bottlenecks. To mitigate this problem, we propose a novel Processing-in-Pixel-in-memory (P2M) paradigm, that customizes the pixel array by adding support for analog multi-channel, multi-bit convolution, batch normalization, and Rectified Linear Units (ReLU). Our solution includes a holistic algorithm-circuit co-design approach and the resulting P2M paradigm can be used as a drop-in replacement for embedding memory-intensive first few layers of convolutional neural network (CNN) models within foundry-manufacturable CMOS image sensor platforms. Our experimental results indicate that P2M reduces data transfer bandwidth from sensors and analog to digital conversions by [Formula: see text], and the energy-delay product (EDP) incurred in processing a MobileNetV2 model on a TinyML use case for visual wake words dataset (VWW) by up to [Formula: see text] compared to standard near-processing or in-sensor implementations, without any significant drop in test accuracy.

Beam shaping for ultra-compact waveguide crossings on monolithic silicon photonics platform.

A beam shaping approach has been implemented to realize high-performance waveguide crossings based on cosine tapers. Devices with a compact footprint of 4.7µm×4.7µm were fabricated on the GLOBALFOUNDRIES 45 nm monolithic silicon photonics platform (45 CLO technology). Fabricated devices are found to be nearly wavelength independent (±0.035dB for 1260nm≤λ≤1360nm) with low insertion loss (∼0.2dB) and crosstalk (-35dB). The measured response of the devices is consistent with the three-dimensional finite-difference time-domain simulation results. The design stability is validated by measuring the device insertion loss on eight chips, which is found to be 0.197±0.017dB at the designed center wavelength of 1310 nm.

Hybrid vanadate waveguiding configurations for extreme optical confinement and efficient polarization management in the near-infrared.

Vanadate materials such as CaVO3 and SrVO3 were recently proposed as promising alternatives to their conventional transparent conducting oxide counterparts owing to the superior capability for simultaneous realization of high optical transparency and high electrical conductivity originating from strong electron-electron interactions. Here we show that, in addition to their remarkable optoelectronic properties as conducting materials, their incorporation into planar waveguiding configurations could enable outstanding optical performance that is otherwise difficult to achieve with conventional material building blocks, especially metals. Starting from the guided wave at a single CaVO3/dielectric interface, the unique dispersion relationship and propagation property of the fundamental mode are revealed and compared to the conventional surface plasmon polariton associated with a silver/dielectric planar configuration. The superior confinement capability and the unique modal attenuation of the CaVO3-based waveguiding platform are further demonstrated via investigating silicon-based hybrid guiding schemes integrated with a CaVO3 nanostructure. By leveraging the pronounced polarization dependent loss in the hybrid configuration, an ultra-compact TE-pass polarizer is numerically demonstrated at telecommunication wavelengths. This transformative design features a reduced footprint and enhanced optical performance when benchmarked against the current state-of-the-art in hybrid silicon polarizers. The combination of these vanadate materials with traditional waveguiding platforms thereby opens new avenues towards miniaturized functional integrated photonic devices, and potentially enables a variety of intriguing applications at the sub-diffraction-limited scale.

Electric-field-controlled ferromagnetism in high-Curie-temperature Mn0.05Ge0.95 quantum dots.

Electric-field manipulation of ferromagnetism has the potential for developing a new generation of electric devices to resolve the power consumption and variability issues in today's microelectronics industry. Among various dilute magnetic semiconductors (DMSs), group IV elements such as Si and Ge are the ideal material candidates because of their excellent compatibility with the conventional complementary metal-oxide-semiconductor (MOS) technology. Here we report, for the first time, the successful synthesis of self-assembled dilute magnetic Mn(0.05)Ge(0.95) quantum dots with ferromagnetic order above room temperature, and the demonstration of electric-field control of ferromagnetism in MOS ferromagnetic capacitors up to 100 K. We found that by applying electric fields to a MOS gate structure, the ferromagnetism of the channel layer can be effectively modulated through the change of hole concentration inside the quantum dots. Our results are fundamentally important in the understanding and to the realization of high-efficiency Ge-based spin field-effect transistors.

Single crystalline Ge(1-x)Mn(x) nanowires as building blocks for nanoelectronics.

Magnetically doped Si and Ge nanowires have potential application in future nanowire spin-based devices. Here, we report a supercritical fluid method for producing single crystalline Mn-doped Ge nanowires with a Mn-doping concentration of between 0.5-1.0 atomic % that display ferromagnetism above 300 K and a superior performance with respect to the hole mobility of around 340 cm(2)/Vs, demonstrating the potential of using these nanowires as building blocks for electronic devices.

InAs/GaAs nanostructures grown on patterned Si(001) by molecular beam epitaxy.

The potential benefit from the combination of the optoelectronic and electronic functionality of III-V semiconductors with silicon technology is one of the most desired outcomes to date. Here we have systematically investigated the optical properties of InAs quantum structure embedded in GaAs grown on patterned sub-micron and nanosize holes on Si(001). III-V material tends to accumulate in the patterned sub-micron holes and a material depletion region is observed around holes when GaAs/InAs/GaAs is deposited directly on patterned Si(001). By use of a 60 nm SiO(2) layer and patterning sub-micron and nanosize holes through the oxide layer to the substrate, we demonstrate that high optical quality InAs nanostructures, both quantum dots and quantum wells, formed by a two-monolayer InAs layer embedded in GaAs can be epitaxially grown on Si(001). We also report the power-dependent and temperature-dependent photoluminescence spectra of these structures. The results show that hole diameter (sub-micron versus nanosize) has a strong effect on the structural and optical properties of GaAs/InAs/GaAs nanostructures.