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1.
ACS Appl Mater Interfaces ; 11(28): 25358-25368, 2019 Jul 17.
Article in English | MEDLINE | ID: mdl-31264831

ABSTRACT

Organic electronics demand new platforms that can make integrated circuits and undergo mass production while maintaining diverse functions with high performance. The field-effect transistor has great potential to be a multifunctional device capable of sensing, data processing, data storage, and display. Currently, transistor-based devices cannot be considered intrinsic multifunctional devices because all installed functions are mutually coupled. Such incompatibilities are a crucial barrier to developing an all-in-one multifunctional device capable of driving each function individually. In this study, we focus on the decoupling of electric switching and data storage functions in an organic ferroelectric memory transistor. To overcome the incompatibility of each function, the high permittivity needed for electrical switching and the ferroelectricity needed for data storage become compatible by restricting the motion of poly(vinylidene fluoride-trifluoroethylene) via photocrosslinking with bis-perfluorobenzoazide. The two-in-one device consisting of a photocrosslinked ferroelectric layer exhibits reversible and individual dual-functional operation as a typical transistor with nonvolatile memory. Moreover, a p-MOS depletion load inverter composed of the two transistors with different threshold voltages is also demonstrated by simply changing only one of the threshold voltages by polarization switching. We believe that the two-in-one device will be considered a potential component of integrated organic logic circuits, including memory, in the future.

2.
ACS Appl Mater Interfaces ; 11(25): 22575-22582, 2019 Jun 26.
Article in English | MEDLINE | ID: mdl-31148447

ABSTRACT

Wearable technology offers new ways to be more proactive about our health and surroundings in real time. For next-generation wearable systems, robust storage and recording media are required to monitor and process the essential electrical signals generated under various unpredictable strain conditions. Here, we report the first fibriform organic transistor memory integrated on a thin and flexible metal wire. A capillary tube coating system allows the formation of a thin and nanograined organic ferroelectric film on the wire. The uniform morphology imparts excellent switching stability (∼100 cycles), quasi-permanent retention (over 5 × 104 s), and low-voltage operation (below 5 V) to the fiber-shaped memory devices. When sewn in a stretchable textile fabric, the memory fiber achieves long retention time of more than 104 s with negligible degradation of memory window even under a constant diagonal strain of 100% that exhibits reliable data storage under tough environments. These results illustrate the possibility of the practical, wearable fiber memory for recording electronic signals in smart garment applications.

3.
ACS Appl Mater Interfaces ; 11(1): 1071-1080, 2019 Jan 09.
Article in English | MEDLINE | ID: mdl-30525395

ABSTRACT

Ultrathin conformable artificial synapse platforms that can be used as on-body or wearable chips suggest a path to build next-generation, wearable, intelligent electronic systems that can mimic the synaptic operations of the human brain. So far, an artificial synapse architecture with ultimate mechanical flexibility in a freestanding form while maintaining its functionalities with high stability and accuracy on any conformable substrate has not been demonstrated yet. Here, we demonstrate the first ultrathin artificial synapse (∼500 nm total thickness) that features freestanding ferroelectric organic neuromorphic transistors (FONTs), which can stand alone without a substrate or an encapsulation layer. Our simple dry peel-off process allows integration of the freestanding FONTs with an extremely thin film that is transferable to various conformable substrates. The FONTs exhibit excellent and reliable synaptic functions, which can be modulated by diverse electrical stimuli and relative timing (or temporal order) between the pre- and postsynaptic spikes. Furthermore, the FONTs show sustainable synaptic plasticity even under folded condition ( R = 50 µm, ε = 0.48%) for more than 6000 input spikes. Our study suggests that the ultrathin conformable organic artificial synapse platforms are considered as one of key technologies for realization of wearable intelligent electronics in the future.

4.
Nano Converg ; 5(1): 20, 2018.
Article in English | MEDLINE | ID: mdl-30101053

ABSTRACT

Low voltage operational organic transistors (< 4 V) based on pentacene were successfully fabricated with hybrid dielectric films composed of aluminum oxide using atomic layer deposition and various phosphonic acid-based self-assembled monolayers as the gate dielectrics. High capacitances up to 279 nF/cm2, low leakage current densities of 10-8 A/cm2 at 6 V, and high breakdown fields up to 7.5 MV/cm were obtained. The transistors with the octadecylphosphonic acid hybrid dielectric exhibited an improved saturation mobility of 0.58 cm2/Vs, a subthreshold slope of 151 mV/decade, a threshold voltage of - 1.84 V and an on-off current ratio of 106. The low surface energies of the self-assembled monolayers having non-polar terminal groups, such as methyl and pentafluorophenoxy, improved the carrier conduction of the transistors due to the pentacene growth with an edge-on orientation for low voltage operation. The pentafluorophenoxy end-group showed an accumulation of holes at the semiconductor-dielectric interface.

5.
Nano Lett ; 17(12): 7462-7470, 2017 12 13.
Article in English | MEDLINE | ID: mdl-29182342

ABSTRACT

The controllability of switching conductive filaments is one of the central issues in the development of reliable metal-oxide resistive memory because the random dynamic nature and formation of the filaments pose an obstacle to desirable switching performance. Here, we introduce a simple and novel approach to control and form a single silicon nanocrystal (Si-NC) filament for use in SiOx memory devices. The filament is formed with a confined vertical nanoscale gap by using a well-defined single vertical truncated conical nanopore (StcNP) structure. The physical dimensions of the Si-NC filaments such as number, size, and length, which have a significant influence on the switching properties, can be simply engineered by the breakdown of an Au wire through different StcNP structures. In particular, we demonstrate that the designed SiOx memory junction with a StcNP of pore depth of ∼75 nm and a bottom diameter of ∼10 nm exhibited a switching speed of up to 6 ns for both set and reset process, significantly faster than reported SiOx memory devices. The device also exhibited a high ON-OFF ratio, multistate storage ability, acceptable endurance, and retention stability. The influence of the physical dimensions of the StcNP on the switching features is discussed based on the simulated temperature profiles of the Au wire and the nanogap size generated inside the StcNP structure during electromigration.

6.
Nano Lett ; 15(4): 2542-7, 2015 Apr 08.
Article in English | MEDLINE | ID: mdl-25811444

ABSTRACT

The advantages of graphene photodetectors were utilized to design a new multifunctional graphene optoelectronic device. Organic semiconductors, gold nanoparticles (AuNPs), and graphene were combined to fabricate a photodetecting device with a nonvolatile memory function for storing photonic signals. A pentacene organic semiconductor acted as a light absorption layer in the device and provided a high hole photocurrent to the graphene channel. The AuNPs, positioned between the tunneling and blocking dielectric layers, acted as both a charge trap layer and a plasmonic light scatterer, which enable storing of the information about the incident light. The proposed pentacene-graphene-AuNP hybrid photodetector not only performed well as a photodetector in the visible light range, it also was able to store the photonic signal in the form of persistent current. The good photodetection performance resulted from the plasmonics-enabled enhancement of the optical absorption and from the photogating mechanisms in the pentacene. The device provided a photoresponse that depended on the wavelength of incident light; therefore, the signal information (both the wavelength and intensity) of the incident light was effectively committed to memory. The simple process of applying a negative pulse gate voltage could then erase the programmed information. The proposed photodetector with the capacity to store a photonic signal in memory represents a significant step toward the use of graphene in optoelectronic devices.

7.
Small ; 11(3): 311-8, 2015 Jan 21.
Article in English | MEDLINE | ID: mdl-25163911

ABSTRACT

A novel transparent, flexible, graphene channel floating-gate transistor memory (FGTM) device is fabricated using a graphene oxide (GO) charge trapping layer on a plastic substrate. The GO layer, which bears ammonium groups (NH3+), is prepared at the interface between the crosslinked PVP (cPVP) tunneling dielectric and the Al2 O3 blocking dielectric layers. Important design rules are proposed for a high-performance graphene memory device: (i) precise doping of the graphene channel, and (ii) chemical functionalization of the GO charge trapping layer. How to control memory characteristics by graphene doping is systematically explained, and the optimal conditions for the best performance of the memory devices are found. Note that precise control over the doping of the graphene channel maximizes the conductance difference at a zero gate voltage, which reduces the device power consumption. The proposed optimization via graphene doping can be applied to any graphene channel transistor-type memory device. Additionally, the positively charged GO (GO-NH3+) interacts electrostatically with hydroxyl groups of both UV-treated Al2 O3 and PVP layers, which enhances the interfacial adhesion, and thus the mechanical stability of the device during bending. The resulting graphene-graphene oxide FGTMs exhibit excellent memory characteristics, including a large memory window (11.7 V), fast switching speed (1 µs), cyclic endurance (200 cycles), stable retention (10(5) s), and good mechanical stability (1000 cycles).

8.
Nanoscale ; 6(24): 15286-92, 2014 Dec 21.
Article in English | MEDLINE | ID: mdl-25382657

ABSTRACT

A transparent flexible graphene nano-floating gate transistor memory (NFGTM) device was developed by combining a single-layer graphene active channel with gold nanoparticle (AuNP) charge trap elements. We systematically controlled the sizes of the AuNPs, the thickness of the tunneling dielectric layer, and the graphene doping level. In particular, we propose that the conductance difference (i.e., memory window) between the programming and erasing operations at a specific read gate voltage can be maximized through the doping. The resulting graphene NFGTMs developed here exhibited excellent programmable memory performances compared to previously reported graphene memory devices and displayed a large memory window (12 V), fast switching speed (1 µs), robust electrical reliability (10(5) s), and good mechanical (500 cycles) and thermal stability (100 °C).

9.
ACS Appl Mater Interfaces ; 6(9): 6589-97, 2014 May 14.
Article in English | MEDLINE | ID: mdl-24708562

ABSTRACT

We characterized the electrical properties of a field-effect transistor (FET) and a nonvolatile memory device based on a solution-processable low bandgap small molecule, Si1TDPP-EE-C6. The small molecule consisted of electron-rich thiophene-dithienosilole-thiophene (Si1T) units and electron-deficient diketopyrrolopyrrole (DPP) units. The as-spun Si1TDPP-EE-C6 FET device exhibited ambipolar transport properties with a hole mobility of 7.3×10(-5) cm2/(Vs) and an electron mobility of 1.6×10(-5) cm2/(Vs). Thermal annealing at 110 °C led to a significant increase in carrier mobility, with hole and electron mobilities of 3.7×10(-3) and 5.1×10(-4) cm2/(Vs), respectively. This improvement is strongly correlated with the increased film crystallinity and reduced π-π intermolecular stacking distance upon thermal annealing, revealed by grazing incidence X-ray diffraction (GIXD) and atomic force microscopy (AFM) measurements. In addition, nonvolatile memory devices based on Si1TDPP-EE-C6 were successfully fabricated by incorporating Au nanoparticles (AuNPs) as charge trapping sites at the interface between the silicon oxide (SiO2) and cross-linked poly(4-vinylphenol) (cPVP) dielectrics. The device exhibited reliable nonvolatile memory characteristics, including a wide memory window of 98 V, a high on/off-current ratio of 1×10(3), and good electrical reliability. Overall, we demonstrate that donor-acceptor-type small molecules are a potentially important class of materials for ambipolar FETs and nonvolatile memory applications.

10.
Nano Lett ; 12(7): 3472-6, 2012 Jul 11.
Article in English | MEDLINE | ID: mdl-22686138

ABSTRACT

High-performance, flexible all graphene-based thin film transistor (TFT) was fabricated on plastic substrates using a graphene active layer, graphene oxide (GO) dielectrics, and graphene electrodes. The GO dielectrics exhibit a dielectric constant (3.1 at 77 K), low leakage current (17 mA/cm(2)), breakdown bias (1.5 × 10(6) V/cm), and good mechanical flexibility. Graphene-based TFTs showed a hole and electron mobility of 300 and 250 cm(2)/(V·s), respectively, at a drain bias of -0.1 V. Moreover, graphene TFTs on the plastic substrates exhibited remarkably good mechanical flexibility and optical transmittance. This method explores a significant step for the application of graphene toward flexible and stretchable electronics.

11.
Nanotechnology ; 21(42): 425201, 2010 Oct 22.
Article in English | MEDLINE | ID: mdl-20858937

ABSTRACT

This paper reports a mechanically flexible, transparent thin film transistor that uses graphene as a conducting electrode and single-walled carbon nanotubes (SWNTs) as a semiconducting channel. These SWNTs and graphene films were printed on flexible plastic substrates using a printing method. The resulting devices exhibited a mobility of ∼ 2 cm(2) V(-1) s -1), On/Off ratio of ∼ 10(2), transmittance of ∼ 81% and excellent mechanical bendability.

12.
Nano Lett ; 10(2): 490-3, 2010 Feb 10.
Article in English | MEDLINE | ID: mdl-20044841

ABSTRACT

We developed means to produce wafer scale, high-quality graphene films as large as 3 in. wafer size on Ni and Cu films under ambient pressure and transfer them onto arbitrary substrates through instantaneous etching of metal layers. We also demonstrated the applications of the large-area graphene films for the batch fabrication of field-effect transistor (FET) arrays and stretchable strain gauges showing extraordinary performances. Transistors showed the hole and electron mobilities of the device of 1100 +/- 70 and 550 +/- 50 cm(2)/(V s) at drain bias of -0.75 V, respectively. The piezo-resistance gauge factor of strain sensor was approximately 6.1. These methods represent a significant step toward the realization of graphene devices in wafer scale as well as application in optoelectronics, flexible and stretchable electronics.


Subject(s)
Copper/chemistry , Nanotechnology/methods , Nickel/chemistry , Catalysis , Dimethylpolysiloxanes/chemistry , Electronics , Equipment Design , Graphite/chemistry , Materials Testing , Nanostructures/chemistry , Optics and Photonics , Polymers/chemistry , Pressure
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