Characteristics of Using Oriental Medicine Clinics during the Japanese Occupation: An Analysis of the 1931 Seoul Bochun Clinic Account Book.

This article analyzes the "account book" of Kim Young-hoon (1882-1974), which summarizes information about patients at his Bochun Clinic in Seoul (then Gyeongseong) in 1931. Kim Young-hoon was a pivotal figure in the medical scene throughout the Korean Empire, the Japanese occupation, and the early years of the Republic of Korea. He left behind a large amount of documentation during his 60 years of practice at the Bochun Clinic, which he opened in the spring of 1909. In particular, the 1931 "account book" offers an insight into the daily life histories of his patients. Among the patient-visitors recorded in the account book, there were many influential people of the time, ranging from privileged individuals to anti-Japanese independence activists, from those in political and economic fields to those in academic and entertainment fields. At the same time, a significant number of lower-class people also visited the Clinic. Geographically, patients were centered in the city center of the capital, Gyeongseong, but were also widely distributed throughout the country. There are indications that those from the rural areas stayed in the homes of their acquaintances in Seoul. As such, the account book provides a tangible, concrete picture of the clinic's management for the year 1931, including visitor demographics, visiting diagnoses, telephone consultations, and the total cost of medicinal prescriptions. Because the account book is a one-year statistic, it has its limitations; however, it is the smallest unit that can be analyzed statistically. It provides insights into how many people came in over the course of a year and how much they spent. The expenditures are kept per individual family. The patient's name, prescribed medication, and the price of the medicine are mandatorily included, and in many cases, the place of residence and family relationships are also noted. The account book shows several layers of householders, servants, and employees in the extended family; it also shows people in various occupations. A few privileged families accounted for nearly half of the total expenditures, and the powerful visited frequently, utilizing Oriental medicine for many of their daily needs. For some, the Bochun Clinic is reminiscent of the royal temples of the dynasties. Patients come from the center and suburbs of Seoul, as well as from all over the country. In one year, more than one thousand types of prescriptions are issued and the total cost of medicines is about 33 seom (≒180 liters of rice). Although there is a concentration of high-frequency prescriptions, more than a thousand prescriptions are prescribed only once, which shows that the practice is specialized for each individual. Patient visits, consultations, and telephone use are observed, and the use of new drugs, quinine, and special ginseng as one-herb medication (danbang) are also noticeable. The statistical analysis of the 1931 Bochun Clinic "account book" can serve as a milestone for comparative analysis of the patterns of herbal medicine use before and after that year. Meanwhile, the Bochun Clinic "account book" shows the continuation of traditional practices of herbal medicine by both the powerful and the masses. On the one hand, Koreans responded to the coercive tide of modernity symbolized by the Imperial Governorate of Japan, but on the other hand, they were unwilling to let go of tradition and their own authority. While actively embracing the tide of civilization, Koreans also internalized their own rationality and sought to open a new path forward, a sentiment discernible between the lines of the "account book."

Analyzing Various Structural and Temperature Characteristics of Floating Gate Field Effect Transistors Applicable to Fine-Grain Logic-in-Memory Devices.

Although the von Neumann architecture-based computing system has been used for a long time, its limitations in data processing, energy consumption, etc. have led to research on various devices and circuit systems suitable for logic-in-memory (LiM) computing applications. In this paper, we analyze the temperature-dependent device and circuit characteristics of the floating gate field effect transistor (FGFET) source drain barrier (SDB) and FGFET central shallow barrier (CSB) identified in previous papers, and their applicability to LiM applications is specifically confirmed. These FGFETs have the advantage of being much more compatible with existing silicon-based complementary metal oxide semiconductor (CMOS) processes compared to devices using new materials such as ferroelectrics for LiM computing. Utilizing the 32 nm technology node, the leading-edge node where the planar metal oxide semiconductor field effect transistor structure is applied, FGFET devices were analyzed in TCAD, and an environment for analyzing circuits in HSPICE was established. To seamlessly connect FGFET-based devices and circuit analyses, compact models of FGFET-SDB and -CSBs were developed and applied to the design of ternary content-addressable memory (TCAM) and full adder (FA) circuits for LiM. In addition, depression and potential for application of FGFET devices to neural networks were analyzed. The temperature-dependent characteristics of the TCAM and FA circuits with FGFETs were analyzed as an indicator of energy and delay time, and the appropriate number of CSBs should be applied.

Oxide and 2D TMD semiconductors for 3D DRAM cell transistors.

As the downscaling of conventional dynamic random-access memory (DRAM) has reached its limits, 3D DRAM has been proposed as a next-generation DRAM cell architecture. However, incorporating silicon into 3D DRAM technology faces various challenges in securing cost-effective high cell transistor performance. Therefore, many researchers are exploring the application of next-generation semiconductor materials, such as transition oxide semiconductors (OSs) and metal dichalcogenides (TMDs), to address these challenges and to realize 3D DRAM. This study provides an overview of the proposed structures for 3D DRAM, compares the characteristics of OSs and TMDs, and discusses the feasibility of employing the OSs and TMDs as the channel material for 3D DRAM. Furthermore, we review recent progress in 3D DRAM using the OSs, discussing their potential to overcome challenges in silicon-based approaches.

High-κ Dielectric (HfO2)/2D Semiconductor (HfSe2) Gate Stack for Low-Power Steep-Switching Computing Devices.

Herein, a high-quality gate stack (native HfO2 formed on 2D HfSe2) fabricated via plasma oxidation is reported, realizing an atomically sharp interface with a suppressed interface trap density (Dit ≈ 5 × 1010 cm-2 eV-1). The chemically converted HfO2 exhibits dielectric constant, κ ≈ 23, resulting in low gate leakage current (≈10-3 A cm-2) at equivalent oxide thickness ≈0.5 nm. Density functional calculations indicate that the atomistic mechanism for achieving a high-quality interface is the possibility of O atoms replacing the Se atoms of the interfacial HfSe2 layer without a substitution energy barrier, allowing layer-by-layer oxidation to proceed. The field-effect-transistor-fabricated HfO2/HfSe2 gate stack demonstrates an almost ideal subthreshold slope (SS) of ≈61 mV dec-1 (over four orders of IDS) at room temperature (300 K), along with a high Ion/Ioff ratio of ≈108 and a small hysteresis of ≈10 mV. Furthermore, by utilizing a device architecture with separately controlled HfO2/HfSe2 gate stack and channel structures, an impact ionization field-effect transistor is fabricated that exhibits n-type steep-switching characteristics with a SS value of 3.43 mV dec-1 at room temperature, overcoming the Boltzmann limit. These results provide a significant step toward the realization of post-Si semiconducting devices for future energy-efficient data-centric computing electronics.

Well-Balanced Ambipolar Charge Transport of Diketopyrrolepyrrole-Based Copolymers: Organic Field-Effect Transistors and High-Voltage Logic Applications.

A poly (3,6-bis(thiophen-2-yl)-2,5-bis(2-decyltetradecyl)-2,5-dihydropyrrolo[3,4-c]pyrrole-1,4-dione-co-(2,3-bis(phenyl)acrylonitrile)) (PDPADPP) copolymer, composed of diketopyrrolopyrrole (DPP) and a cyano (nitrile) group with a vinylene spacer linking two benzene rings, is synthesized via a palladium-catalyzed Suzuki coupling reaction. The electrical performance of PDPADPP in organic field-effect transistors (OFETs) and circuits is investigated. The OFETs based on PDPADPP exhibit typical ambipolar transport characteristics, with the as-cast OFETs demonstrating low field-effect hole and electron mobility values of 0.016 and 0.004 cm2  V-1  s-1 , respectively. However, after thermal annealing at 240 °C, the OFETs exhibit improved transport characteristics with highly balanced ambipolar transport, showing average hole and electron mobility values of 0.065 and 0.116 cm2  V-1  s-1 , respectively. To verify the application of the PDPADPP OFETs in high-voltage logic circuits, compact modeling using the industry-standard small-signal Berkeley short-channel IGFET model (BSIM) is performed, and the logic application characteristics are evaluated. The circuit simulation results demonstrate excellent logic application performance of the PDPADPP-based ambipolar transistor and illustrate that the device annealed at 240 °C exhibits ideal circuit characteristics.

Discovering the anti-cancer phytochemical rutin against breast cancer through the methodical platform based on traditional medicinal knowledge.

A number of therapeutic drugs have been developed from functional chemicals found in plants. Knowledge of plants used for medicinal purposes has historically been transmitted by word of mouth or through literature. The aim of the present study is to provide a systemic platform for the development of lead compounds against breast cancer based on a traditional medical text. To verify our systematic approach, integrating processes consisted of text mining of traditional medical texts, 3-D virtual docking screening, and in vitro and in vivo experimental validations were demonstrated. Our text analysis system identified rutin as a specific phytochemical traditionally used for cancer treatment. 3-D virtual screening predicted that rutin could block EGFR signaling. Thus, we validated significant anticancer effects of rutin against breast cancer cells through blockade of EGFR signaling pathway in vitro. We also demonstrated in vivo anti-cancer effects of rutin using the breast cancer recurrence in vivo models. In summary, our innovative approach might be proper for discovering new phytochemical lead compounds designing for blockade of malignant neoplasm including breast cancer. [BMB Reports 2023; 56(11): 594-599].

Modulation of Contact Resistance of Dual-Gated MoS2 FETs Using Fermi-Level Pinning-Free Antimony Semi-Metal Contacts.

Achieving low contact resistance (RC ) is one of the major challenges in producing 2D FETs for future CMOS technology applications. In this work, the electrical characteristics for semimetal (Sb) and normal metal (Ti) contacted MoS2 devices are systematically analyzed as a function of top and bottom gate-voltages (VTG and VBG ). The semimetal contacts not only significantly reduce RC but also induce a strong dependence of RC on VTG , in sharp contrast to Ti contacts that only modulate RC by varying VBG . The anomalous behavior is attributed to the strongly modulated pseudo-junction resistance (Rjun ) by VTG , resulting from weak Fermi level pinning (FLP) of Sb contacts. In contrast, the resistances under both metallic contacts remain unchanged by VTG as metal screens the electric field from the applied VTG . Technology computer aided design simulations further confirm the contribution of VTG to Rjun , which improves overall RC of Sb-contacted MoS2 devices. Consequently, the Sb contact has a distinctive merit in dual-gated (DG) device structure, as it greatly reduces RC and enables effective gate control by both VBG and VTG . The results offer new insight into the development of DG 2D FETs with enhanced contact properties realized by using semimetals.

Hyper-FET's Phase-Transition-Materials Design Guidelines for Ultra-Low Power Applications at 3 nm Technology Node.

In this work, a hybrid-phase transition field-effects-transistor (hyper-FET) integrated with phase-transition materials (PTM) and a multi-nanosheet FET (mNS-FET) at the 3 nm technology node were analyzed at the device and circuit level. Through this, a benchmark was performed for presenting device design guidelines and for using ultra-low-power applications. We present an optimization flow considering hyper-FET characteristics at the device and circuit level, and analyze hyper-FET performance according to the phase transition time (TT) and baseline-FET off-leakage current (IOFF) variations of the PTM. As a result of inverter ring oscillator (INV RO) circuit analysis, the optimized hyper-FET increases speed by +8.74% and reduces power consumption by -16.55%, with IOFF = 5 nA of baseline-FET and PTM TT = 50 ps compared to the conventional mNS-FET in the ultra-low-power region. As a result of SRAM circuit analysis, the read static noise margin is improved by 43.9%, and static power is reduced by 58.6% in the near-threshold voltage region when the PTM is connected to the pull-down transistor source terminal of 6T SRAM for high density. This is achieved at 41% read current penalty.

A steep switching WSe2 impact ionization field-effect transistor.

The Fermi-Dirac distribution of carriers and the drift-diffusion mode of transport represent two fundamental barriers towards the reduction of the subthreshold slope (SS) and the optimization of the energy consumption of field-effect transistors. In this study, we report the realization of steep-slope impact ionization field-effect transistors (I2FETs) based on a gate-controlled homogeneous WSe2 lateral junction. The devices showed average SS down to 2.73 mV/dec over three decades of source-drain current and an on/off ratio of ~106 at room temperature and low bias voltages (<1 V). We determined that the lucky-drift mechanism of carriers is valid in WSe2, allowing our I2FETs to have high impact ionization coefficients and low SS at room temperature. Moreover, we fabricated a logic inverter based on a WSe2 I2FET and a MoS2 FET, exhibiting an inverter gain of 73 and almost ideal noise margin for high- and low-logic states. Our results provide a promising approach for developing functional devices as front runners for energy-efficient electronic device technology.

Device and Circuit Analysis of Double Gate Field Effect Transistor with Mono-Layer WS2-Channel at Sub-2 nm Technology Node.

In this work, WS2 was adopted as a channel material among transition metal dichalcogenides (TMD) materials that have recently been in the spotlight, and the circuit power performance (power consumption, operating frequency) of the monolayer WS2 field-effect transistor with a double gate structure (DG WS2-FET) was analyzed. It was confirmed that the effective capacitance, which is circuit power performance, was greatly changed by the extrinsic capacitance components of DG WS2-FET, and the spacer region length (LSPC) and dielectric constant (KSPC) values of the spacer that could affect the extrinsic capacitance components were analyzed to identify the circuit power performance. As a result, when LSPC is increased by 1.5 nm with the typical spacer material (KSPC = 7.5), increased operating speed (+4.9%) and reduced active power (-6.8%) are expected. In addition, it is expected that the spacer material improvement by developing the low-k spacer from KSPC = 7.5 to KSPC = 2 at typical LSPC = 8 nm can increase the operating speed by 36.8% while maintaining similar active power consumption. Considering back-end-of-line (BEOL), the change in circuit power performance according to wire length was also analyzed. From these results, it can be seen that reducing the capacitance components of the extrinsic region is very important for improving the circuit power performance of the DG WS2-FET.

Optimization of Gate-All-Around Device to Achieve High Performance and Low Power with Low Substrate Leakage.

In this study on multi-nanosheet field-effect transistor (mNS-FET)-one of the gate-all-around FETs (GAAFET) in the 3 nm technology node dimension-3D TCAD (technology computer-aided design) was used to attain optimally reduced substrate leakage from options including a punch-through-stopper (PTS) doping scheme and a bottom oxide (BO) scheme for bottom isolation, with the performance improvement being shown in the circuit-level dynamic operation using the mNS-FET. The PTS doping concentration requires a high value of >5 × 1018 cm-3 to reduce gate induced drain leakage (GIDL), regardless of the presence or absence of the bottom isolation layer. When the bottom isolation is applied together with the PTS doping scheme, the capacitance reduction is larger than the on-state current reduction, as compared to when only the PTS doping concentration is applied. The effects of such transistor characteristics on the performance and capabilities of various circuit types-such as an inverter ring oscillator (RO), a full adder (FA) circuit, and a static random-access memory (SRAM)-were assessed. For the RO, applying BO along with the PTS doping allows the operating speed to be increased by 11.3% at the same power, or alternatively enables 26.4% less power consumption at the same speed. For the FA, power can be reduced by 6.45%, energy delay product (EDP) by 21.4%, and delay by 16.8% at the same standby power when BO and PTS are both applied. Finally, for the SRAM, read current (IREAD) increased by 18.7% and bit-line write margin (BWRM) increased by 12.5% at the same standby power. Through the circuit simulations, the Case 5 model (PTS doping concentration: 5.1 × 1018 cm-3, with BO) is the optimum condition for the best device and circuit performance. These observations confirm that PTS and bottom isolation applications in mNS-FETs can be utilized to enable the superior characteristics of such transistors to translate into high performance integrated circuits.

Faster bone union progression and less sclerosis at the osteotomy margin after medial opening-wedge high tibial osteotomy using highly porous ß-tricalcium phosphate granules versus allogeneic bone chips: A matched case-control study.

BACKGROUND: This study compared bone union progression using highly porous (80% porosity) ß-tricalcium phosphate (ß-TCP) granules or allogeneic bone chips in the gap created by medial opening-wedge high tibial osteotomy (MOWHTO). METHODS: The study population consisted of 54 patients who received MOWHTO with locking plate fixation: 27 patients using highly porous ß-TCP granules, and 27 age- and sex-matched patients using allogeneic bone chips. Bone union progression was evaluated 1, 3, 6, and 12 months postoperatively. The presence of radiographic sclerosis at the osteotomy margin was also assessed. RESULTS: Among all patients, the highest degree of bone union observed 12 months postoperatively was grade 4. As postoperative time passed, bone union progression of highly porous ß-TCP granules increased linearly and was statistically significant compared with that of cancellous allogeneic bone chips (P = 0.014). The presence of radiographic sclerosis at the osteotomy margin was significantly less common in the ß-TCP group than in the allograft group (P = 0.003) and was the strongest predictor of delayed progress of bone union (odds ratio = 6.16, P = 0.006). CONCLUSIONS: Patients who underwent MOWHTO using highly porous ß-TCP granules had faster new bone remodeling, less radiographic sclerosis at the osteotomy margin, and no inferior clinical outcome compared with allogeneic bone chips, as determined at the 1-year follow up. The presence of radiographic sclerosis at the osteotomy margin in patients undergoing MOWHTO using allogeneic bone or synthetic bone substitute may indicate delayed progress of bone union.

Alpha Particle Effect on Multi-Nanosheet Tunneling Field-Effect Transistor at 3-nm Technology Node.

The radiation effects on a multi-nanosheet tunneling-based field effect transistor (NS-TFET) were investigated for a 3-nm technology node using a three-dimensional (3D) technology computer-aided design (TCAD) simulator. An alpha particle was injected into a field effect transistor (FET), which resulted in a drain current fluctuation and caused the integrated circuit to malfunction as the result of a soft-error-rate (SER) issue. It was subsequently observed that radiation effects on NS-TFET were completely different from a conventional drift-diffusion (DD)-based FET. Unlike a conventional DD-based FET, when an alpha particle enters the source and channel areas in the current scenario, a larger drain current fluctuation occurs due to a tunneling mechanism between the source and the channel, and this has a significant effect on the drain current. In addition, as the temperature increases, the radiation effect increases as a result of a decrease in silicon bandgap energy and a resultant increase in band-to-band generation. Finally, the radiation effect was analyzed according to the energy of the alpha particle. These results can provide a guideline by which to design a robust integrated circuit for radiation that is totally different from the conventional DD-FET approach.

Electrohydrodynamic-Jet (EHD)-Printed Diketopyrrolopyroole-Based Copolymer for OFETs and Circuit Applications.

We report the employment of an electrohydrodynamic-jet (EHD)-printed diketopyrrolopyrrole-based copolymer (P-29-DPPDTSE) as the active layer of fabricated organic field-effect transistors (OFETs) and circuits. The device produced at optimal conditions showed a field-effect mobility value of 0.45 cm2/(Vs). The morphologies of the printed P-29-DPPDTSE samples were determined by performing optical microscopy, X-ray diffraction, and atomic force microscopy experiments. In addition, numerical circuit simulations of the optimal printed P-29-DPPDTSE OFETs were done in order to observe how well they would perform in a high-voltage logic circuit application. The optimal printed P-29-DPPDTSE OFET showed a 0.5 kHz inverter frequency and 1.2 kHz ring oscillator frequency at a 40 V supply condition, indicating the feasibility of its use in a logic circuit application at high voltage.

Analysis of Variation and Ferroelectric Layer Thickness on Negative Capacitance Nanowire Field-Effect Transistor.

We investigate the interrelation between some variations and the stability of Negative Capacitance Field-Effect Transistors (NC FETs). When a variation effect is considered, stability issues which are making hysteretic operation should be considered for NC FETs as well. In this paper, to make sure of stability and hysteresis-free operation, a thickness margin of ferroelectric layer is suggested. It is the easiest solution for designing and surest method of vouching for hysteresis-free operation. Although some disadvantages which make subthreshold swing (SS) a bit higher than without a margin on thickness of ferroelectric layer (TFE) can be caused, both still high performance and stable operation can be achieved.

Variability-Aware Simulation Strategy for Gate-All-Around Vertical Field Effect Transistor.

In this work, the work function variation (WFV) and global variability (GV) sources on 5 nm node gate-all-around (GAA) silicon vertical field-effect transistor (VFET) devices are studied through technology computer-aided design (TCAD) simulations and spice simulation based on BSIM-CMG model. Compared to conventional lateral FET devices, VFETs can increase the gate area effectively while minimizing the loss of layout area due to their structural characteristics. Considering VFET devices below 5 nm node, an expansion of the gate area of the device reduces the influence of WFV. However, the effect of GV is exacerbated by weakening gate controllability. In order to analyze the exact variability issues, it is necessary to consider not only the influence by the WFV but also the influence by the GV. Therefore, we propose accurate guideline by analyzing the integrated variability issues in a various VFET device structures in a single device and a 6-T SRAM bit cells.

Effect of Various Geometry Parameters on the Performance of Nanoplate Field Effect Transistor with Negative Capacitance.

In this paper, we investigate the impact of geometry parameters such as ferroelectric layer thickness (TFE), extension length (LExt), overlap length (Lov) on negative capacitance FET (NCFET). The NCFET is designed using HfZrO2 (HZO) ferroelectric materials and the Nanoplate FET (NPFET) presented as a next generation device. We use the 3-D TCAD Sentaurus simulator to analyze characteristics of the NCFET. The NCFET designed considering the stable condition overcomes the Boltzmann limit (i.e., the physical limit in the S.S., which is 60 mV/decade at 300 K) through the steep subthreshold swing (S.S.) and exhibits negative Drain-induced barrier lowering (DIBL) phenomenon. When examining the characteristics of NPFET and NCFET according to LExt and Lov, the NCFET exhibits gate capacitance (Cgg) tendency opposite to that of the NPFET. The NCFET with the scaled VDD has a significant advantage over the gate delay (τd). The NCFET has better performance in environments where conventional device is more vulnerable to short channel effects (SCEs).

Device Optimization of Nano-Plate Transistors for 3.5 nm Technology Node.

In this paper, lateral gate-all-around nano-plate transistors (NP-FETs) for 3.5 nm technology node were optimized and compared with other nodes such as 7 nm and 5 nm node devices. The transistors' electrostatic was analyzed using a 3D TCAD simulation. We firstly optimized physical parameters such as channel radius and thickness. The NP-FETs for 3.5 nm node had better gate controllability due to smaller channel thickness and therefore showed an advantage in subthreshold swing (S.S.). However, parasitic resistance and capacitance, and low bias condition of scaled device lowered on-current level. These problems of smaller device were also related to limitation of RC-delay performance. Accordingly, the scaled device with optimized physical parameters showed ~1% decrease in delay performance compared to 5 nm node device. In order to improve RC-delay performance, trenched contact method and channel strain engineering method were separately applied for the same device. For each engineering technique, the on-current boosting was successful, showing ~14% faster RC-delay performance with strain engineering and ~18% faster RC-delay with trenched contact method.

Oleanolic Acids Inhibit Vascular Endothelial Growth Factor Receptor 2 Signaling in Endothelial Cells: Implication for Anti-Angiogenic Therapy.

Angiogenesis must be precisely controlled because uncontrolled angiogenesis is involved in aggravation of disease symptoms. Vascular endothelial growth factor (VEGF)/VEGF receptor 2 (VEGFR-2) signaling is a key pathway leading to angiogenic responses in vascular endothelial cells (ECs). Therefore, targeting VEGF/VEGFR-2 signaling may be effective at modulating angiogenesis to alleviate various disease symptoms. Oleanolic acid was verified as a VEGFR-2 binding chemical from anticancer herbs with similar binding affinity as a reference drug in the Protein Data Bank (PDB) entry 3CJG of model A coordination. Oleanolic acid effectively inhibited VEGF-induced VEGFR-2 activation and angiogenesis in HU-VECs without cytotoxicity. We also verified that oleanolic acid inhibits in vivo angiogenesis during the development and the course of the retinopathy of prematurity (ROP) model in the mouse retina. Taken together, our results suggest a potential therapeutic benefit of oleanolic acid for inhibiting angiogenesis in proangiogenic diseases, including retinopathy.

Repurposing compact discs as master molds to fabricate high-performance organic nanowire field-effect transistors.

Organic field-effect transistors (OFETs) have been developed over the past few decades due to their potential applications in future electronics such as wearable and foldable electronics. As the electrical performance of OFETs has improved, patterning organic semiconducting crystals has become a key issue for their commercialization. However, conventional soft lithographic techniques have required the use of expensive processes to fabricate high-resolution master molds. In this study, we demonstrated a cost-effective method to prepare nanopatterned master molds for the fabrication of high-performance nanowire OFETs. We repurposed commercially available compact discs (CDs) as master molds because they already have linear nanopatterns on their surface. Flexible nanopatterned templates were replicated from the CDs using UV-imprint lithography. Subsequently, 6,13-bis-(triisopropylsilylethynyl) pentacene nanowires (NWs) were grown from the templates using a capillary force-assisted lithographic technique. The NW-based OFETs showed a high average field-effect mobility of 2.04 cm2 V-1 s-1. This result was attributed to the high crystallinity of the NWs and to their crystal orientation favorable for charge transport.