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1.
Materials (Basel) ; 15(23)2022 Nov 23.
Article in English | MEDLINE | ID: mdl-36499822

ABSTRACT

Embedded three-dimensional (3-D) metal-insulator-metal (MIM) decoupling capacitors with high-κ dielectric films of high capacitance and long-life time are increasingly needed on integrated chips. Towards achieving better electrical performance, there is a need for investigation into the influence of the variation in atomic layer deposition (ALD) parameters used for thin high-κ dielectric films (10 nm) made of Al2O3-doped ZrO2. This variation should always be related to the structural uniformity, the electrical characteristics, and the electrical reliability of the capacitors. This paper discusses the influence of different Zr precursor pulse times per ALD cycle and deposition temperatures (283 °C/556 K and 303 °C/576 K) with respect to the capacitance density (C-V), voltage linearity and leakage current density (I-V). Moreover, the dielectric breakdown and TDDB characteristics are evaluated under a wide range of temperatures (223-423 K).

2.
Nanotechnology ; 32(42)2021 Jul 29.
Article in English | MEDLINE | ID: mdl-34261048

ABSTRACT

The discovery of ferroelectricity in the fluorite structure based hafnium oxide (HfO2) material sparked major efforts for reviving the ferroelectric field effect transistor (FeFET) memory concept. A Novel metal-ferroelectric-metal-ferroelectric-insulator-semiconductor (MFMFIS) FeFET memory is reported based on dual ferroelectric integration as an MFM and MFIS in a single gate stack using Si-doped Hafnium oxide (HSO) ferroelectric (FE) material. The MFMFIS top and bottom electrode contacts, dual HSO based ferroelectric layers, and tailored MFM to MFIS area ratio (AR-TB) provide a flexible stack structure tuning for improving the FeFET performance. The AR-TB tuning shows a tradeoff between the MFM voltage increase and the weaker FET Si channel inversion, particularly notable in the drain saturation currentID(sat)when the AR-TB ratio decreases. Dual HSO ferroelectric layer integration enables a maximized memory window (MW) and dynamic control of its size by tuning the MFM to MFIS switching contribution through the AR-TB change. The stack structure control via the AR-TB tuning shows further merits in terms of a low voltage switching for a saturated MW size, an extremely linear at wide dynamic range of the current update, as well as high symmetry in the long term synaptic potentiation and depression. The MFMFIS stack reliability is reported in terms of the switching variability, temperature dependence, endurance, and retention. The MFMFIS concept is thoroughly discussed revealing profound insights on the optimal MFMFIS stack structure control for enhancing the FeFET memory performance.

3.
ACS Appl Mater Interfaces ; 12(35): 39252-39260, 2020 Sep 02.
Article in English | MEDLINE | ID: mdl-32805107

ABSTRACT

An in-depth understanding of lithium (Li) diffusion barriers is a crucial factor for enabling Li-ion-based devices such as three-dimensional (3D) thin-film batteries and synaptic redox transistors integrated on silicon substrates. Diffusion of Li ions into silicon can damage the surrounding components, detach the device itself, lead to battery capacity loss, and cause an uncontrolled change of the transistor channel conductance. In this study, we analyze for the first time ultrathin 10 nm titanium nitride (TiN) films as a bifunctional Li-ion diffusion barrier and current collector. Thermal atomic layer deposition (ALD) and pulsed chemical vapor deposition (pCVD) are employed for manufacturing ultrathin films. The 10 nm ALD films demonstrate excellent blocking capability with an insertion of only 0.03 Li per TiN formula unit exceeding 200 galvanostatic cycles at 3 µA/cm2 between 0.05 and 3 V versus Li/Li+. An ultralow electrical resistivity of 115 µΩ cm is obtained. In contrast, a partial barrier breakdown is observed for 10 nm pCVD films. High surface quality with low contamination is identified as a key factor for the excellent performance of ALD TiN. Conformal deposition of 10 nm ALD TiN in 3D structures with high aspect ratios of up to 20:1 is demonstrated. The measured capacities of the surface area-enhanced samples are in good agreement with the expected values. High-temperature blocking capability is proven for a typical electrode crystallization step. Ultrathin ALD TiN is an ideal candidate for an electrically conducting Li-ion diffusion barrier for Si-integrated devices.

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