Computationally efficient fully-automatic online neural spike detection and sorting in presence of multi-unit activity for implantable circuits.

BACKGROUND: Spike sorting is a basic step for implantable neural interfaces. With the growing number of channels, the process should be computationally efficient, automatic,robust and applicable on implantable circuits. NEW METHOD: The proposed method is a combination of fully-automatic offline and online processes. It introduces a novel method for automatically determining a data-aware spike detection threshold, computationally efficient spike feature extraction, automatic optimal cluster number evaluation and verification coupled with Self-Organizing Maps to accurately determine cluster centroids. The system has the ability of unsupervised online operation after initial fully-automatic offline training. The prime focus of this paper is to fully-automate the complete spike detection and sorting pipeline, while keeping the accuracy high. RESULTS: The proposed system is simulated on two well-known datasets. The automatic threshold improves detection accuracies significantly( > 15%) as compared to the most common detector. The system is able to effectively handle background multi-unit activity with improved performance. COMPARISON: Most of the existing methods are not fully-automatic; they require supervision and expert intervention at various stages of the pipeline. Secondly, existing works focus on foreground neural activity. Recent research has highlighted importance of background multi-unit activity, and this work is amongst the first efforts that proposes and verifies an automatic methodology to effectively handle them as well. CONCLUSION: This paper proposes a fully-automatic, computationally efficient system for spike sorting for both single-unit and multi-unit spikes. Although the scope of this work is design and verification through computer simulations, the system has been designed to be easily transferable into an integrated hardware form.

MRI based automated diagnosis of Alzheimer's: Fusing 3D wavelet-features with clinical data.

This paper presents a novel algorithm for classification of patients with Alzheimer's disease (AD) and Mild Cognitive Impairment (MCI) from the healthy controls (HC) using structural MRI. Feature extraction is based on discrete 3D wavelet transform followed by PCA for transforming the feature space into linearly uncorrelated variables. Linear SVM is used for classification purposes with clinical dementia rating used as the target vector. Proposed methodology is fully automated and independent of the annotation of region of interest. The importance of MRI, demographical data, neuro-psychiatric test scores and statistics calculated over the wavelet coefficients for the classification is studied. Proposed methodology is applied on 197 subjects from a public database. A classification accuracy of 95% was achieved for the case of HC vs AD. For the case of HC vs MCI, and MCI vs AD the classification accuracy of 78% and 81% were achieved. The results are compared with an existing state of the art technique.

Decoding brain cognitive activity across subjects using multimodal M/EEG neuroimaging.

Brain decoding is essential in understanding where and how information is encoded inside the brain. Existing literature has shown that a good classification accuracy is achievable in decoding for single subjects, but multi-subject classification has proven difficult due to the inter-subject variability. In this paper, multi-modal neuroimaging was used to improve two-class multi-subject classification accuracy in a cognitive task of differentiating between a face and a scrambled face. In this transfer learning problem, a feature space based on special-form covariance matrices manipulated with riemannian geometry are used. A supervised two-layer hierarchical model was trained iteratively for estimating classification accuracies. Results are reported on a publically available multi-subject, multi-modal human neuroimaging dataset from MRC Cognition and Brain Sciences Unit, University of Cambridge. The dataset contains simultaneous recordings of electroencephalography (EEG) and magnetoencephalography (MEG). Our model attained, using leave-one-subject-out cross-validation, a classification accuracy of 70.82% for single modal EEG, 81.55% for single modal MEG and 84.98% for multi-modal M/EEG.

Automatic threshold optimization in nonlinear energy operator based spike detection.

In neural spike sorting systems, the performance of the spike detector has to be maximized because it affects the performance of all subsequent blocks. Non-linear energy operator (NEO), is a popular spike detector due to its detection accuracy and its hardware friendly architecture. However, it involves a thresholding stage, whose value is usually approximated and is thus not optimal. This approximation deteriorates the performance in real-time systems where signal to noise ratio (SNR) estimation is a challenge, especially at lower SNRs. In this paper, we propose an automatic and robust threshold calculation method using an empirical gradient technique. The method is tested on two different datasets. The results show that our optimized threshold improves the detection accuracy in both high SNR and low SNR signals. Boxplots are presented that provide a statistical analysis of improvements in accuracy, for instance, the 75th percentile was at 98.7% and 93.5% for the optimized NEO threshold and traditional NEO threshold, respectively.

Adaptive Threshold Neural Spike Detector Using Stationary Wavelet Transform in CMOS.

Spike detection is an essential first step in the analysis of neural recordings. Detection at the frontend eases the bandwidth requirement for wireless data transfer of multichannel recordings to extra-cranial processing units. In this work, a low power digital integrated spike detector based on the lifting stationary wavelet transform is presented and developed. By monitoring the standard deviation of wavelet coefficients, the proposed detector can adaptively set a threshold value online for each channel independently without requiring user intervention. A prototype 16-channel spike detector was designed and tested in an FPGA. The method enables spike detection with nearly 90% accuracy even when the signal-to-noise ratio is as low as 2. The design was mapped to 130 nm CMOS technology and shown to occupy 0.014 mm(2) of area and dissipate 1.7 µW of power per channel, making it suitable for implantable multichannel neural recording systems.

A configurable realtime DWT-based neural data compression and communication VLSI system for wireless implants.

This paper presents the design of a complete multi-channel neural recording compression and communication system for wireless implants that addresses the challenging simultaneous requirements for low power, high bandwidth and error-free communication. The compression engine implements discrete wavelet transform (DWT) and run length encoding schemes and offers a practical data compression solution that faithfully preserves neural information. The communication engine encodes data and commands separately into custom-designed packet structures utilizing a protocol capable of error handling. VLSI hardware implementation of these functions, within the design constraints of a 32-channel neural compression implant, is presented. Designed in 0.13µm CMOS, the core of the neural compression and communication chip occupies only 1.21mm(2) and consumes 800µW of power (25µW per channel at 26KS/s) demonstrating an effective solution for intra-cortical neural interfaces.

A new architecture for neural signal amplification in implantable brain machine interfaces.

This paper reports a new architecture for variable gain-bandwidth amplification of neural signals to be used in implantable multi-channel recording systems. The two most critical requirements in such a front-end circuit are low power consumption and chip area, especially as number of channels increases. The presented architecture employs a single super-performing amplifier, with tunable gain and bandwidth, combined with several low-key preamplifiers and multiplexors for multi-channel recordings. This is in contrast to using copies of high performing amplifier for each channel as is typically reported in earlier literature. The resulting circuits consume lower power and require smaller area as compared to existing designs. Designed in 0.5 µmCMOS, the 8-channel prototype can simultaneously record Local Field Potentials and neural spikes, with an effective power consumption of 3.5 µW per channel and net core area of 0.407 mm(2).

Computationally efficient neural feature extraction for spike sorting in implantable high-density recording systems.

Modern microelectrode arrays acquire neural signals from hundreds of neurons in parallel that are subsequently processed for spike sorting. It is important to identify, extract, and transmit appropriate features that allow accurate spike sorting while using minimum computational resources. This paper describes a new set of spike sorting features, explicitly framed to be computationally efficient and shown to outperform principal component analysis (PCA)-based spike sorting. A hardware friendly architecture, feasible for implantation, is also presented for detecting neural spikes and extracting features to be transmitted for off chip spike classification. The proposed feature set does not require any off-chip training, and requires about 5% of computations as compared to the PCA-based features for the same classification accuracy, tested for spike trains with a broad range of signal-to-noise ratio. Our simulations show a reduction of required bandwidth to about 2% of original data rate, with an average classification accuracy of greater than 94% at a typical signal to noise ratio of 5 dB.

Impact of lossy compression on neural response characteristics extracted from high-density intra-cortical implant data.

In this paper we examine the impact of lossy wavelet compression on the information contained within high-density microelectrode array neural recordings. We have previously reported on the ability of our hardware architecture to perform under the constraints imposed by implantable hardware, as well as on its performance from a compression and signal distortion standpoint. Here we extend that work by examining the amount of information that is lost from the recorded data as a result of the finite precision integer arithmetic and thresholding operations inherent in our system. One method commonly used for the classification and sorting of recorded extracellular action potentials is principal component analysis. This technique is used to statistically obtain the most significant attributes of the spikes, thereby allowing for more accurate classification. We use the separability of the resultant clusters as a measure of the information content within the data, and present the results of simulations demonstrating the impact of various hardware design parameters on this separability.