A Four-Channel Low-Noise Readout IC for Air Flow Measurement Using Hot Wire Anemometer in 0.18 µm CMOS Technology.

Air flow measurements provide significant information required for understanding the characteristics of insect movement. This study proposes a four-channel low-noise readout integrated circuit (IC) in order to measure air flow (air velocity), which can be beneficial to insect biomimetic robot systems that have been studied recently. Instrumentation amplifiers (IAs) with low-noise characteristics in readout ICs are essential because the air flow of an insect's movement, which is electrically converted using a microelectromechanical systems (MEMS) sensor, generally produces a small signal. The fundamental architecture employed in the readout IC is a three op amp IA, and it accomplishes low-noise characteristics by chopping. Moreover, the readout IC has a four-channel input structure and implements an automatic offset calibration loop (AOCL) for input offset correction. The AOCL based on the binary search logic adjusts the output offset by controlling the input voltage bias generated by the R-2R digital-to-analog converter (DAC). The electrically converted air flow signal is amplified using a three op amp IA, which is passed through a low-pass filter (LPF) for ripple rejection that is generated by chopping, and converted to a digital code by a 12-bit successive approximation register (SAR) analog-to-digital converter (ADC). Furthermore, the readout IC contains a low-dropout (LDO) regulator that enables the supply voltage to drive digital circuits, and a serial peripheral interface (SPI) for digital communication. The readout IC is designed with a 0.18 µm CMOS process and the current consumption is 1.886 mA at 3.3 V supply voltage. The IC has an active area of 6.78 mm2 and input-referred noise (IRN) characteristics of 95.4 nV/√Hz at 1 Hz.

Reconfigurable Sensor Analog Front-End Using Low-Noise Chopper-Stabilized Delta-Sigma Capacitance-to-Digital Converter.

This paper proposes a reconfigurable sensor analog front-end using low-noise chopper-stabilized delta-sigma capacitance-to-digital converter (CDC) for capacitive microsensors. The proposed reconfigurable sensor analog front-end can drive both capacitive microsensors and voltage signals by direct conversion without a front-end amplifier. The reconfigurable scheme of the front-end can be implemented in various multi-mode applications, where it is equipped with a fully integrated temperature sensor. A chopper stabilization technique is implemented here to achieve a low-noise characteristic by reducing unexpected low-frequency noises such as offsets and flicker noise. The prototype chip of the proposed sensor analog front-end is fabricated by a standard 0.18-µm 1-poly-6-metal (1P6M) complementary metal-oxide-semiconductor (CMOS) process. It occupies a total active area of 5.37 mm² and achieves an effective resolution of 16.3-bit. The total power consumption is 0.843 mW with a 1.8 V power supply.

Biosignal integrated circuit with simultaneous acquisition of ECG and PPG for wearable healthcare applications.

BACKGROUND: Wearable healthcare systems require measurements from electrocardiograms (ECGs) and photoplethysmograms (PPGs), and the blood pressure of the user. The pulse transit time (PTT) can be calculated by measuring the ECG and PPG simultaneously. Continuous-time blood pressure without using an air cuff can be estimated by using the PTT. OBJECTIVE: This paper presents a biosignal acquisition integrated circuit (IC) that can simultaneously measure the ECG and PPG for wearable healthcare applications. METHODS: Included in this biosignal acquisition circuit are a voltage mode instrumentation amplifier (IA) for ECG acquisition and a current mode transimpedance amplifier for PPG acquisition. The analog outputs from the ECG and PPG channels are muxed and converted to digital signals using 12-bit successive approximation register (SAR) analog-to-digital converter (ADC). RESULTS: The proposed IC is fabricated by using a standard 0.18 µm CMOS process with an active area of 14.44 mm2. The total current consumption for the multichannel IC is 327 µA with a 3.3 V supply. The measured input referred noise of ECG readout channel is 1.3 µVRMS with a bandwidth of 0.5 Hz to 100 Hz. And the measured input referred current noise of the PPG readout channel is 0.122 nA/√Hz with a bandwidth of 0.5 Hz to 100 Hz. CONCLUSIONS: The proposed IC, which is implemented using various circuit techniques, can measure ECG and PPG signals simultaneously to calculate the PTT for wearable healthcare applications.

Fully integrated low-noise readout circuit with automatic offset cancellation loop for capacitive microsensors.

Capacitive sensing schemes are widely used for various microsensors; however, such microsensors suffer from severe parasitic capacitance problems. This paper presents a fully integrated low-noise readout circuit with automatic offset cancellation loop (AOCL) for capacitive microsensors. The output offsets of the capacitive sensing chain due to the parasitic capacitances and process variations are automatically removed using AOCL. The AOCL generates electrically equivalent offset capacitance and enables charge-domain fine calibration using a 10-bit R-2R digital-to-analog converter, charge-transfer switches, and a charge-storing capacitor. The AOCL cancels the unwanted offset by binary-search algorithm based on 10-bit successive approximation register (SAR) logic. The chip is implemented using 0.18 µm complementary metal-oxide-semiconductor (CMOS) process with an active area of 1.76 mm². The power consumption is 220 µW with 3.3 V supply. The input parasitic capacitances within the range of -250 fF to 250 fF can be cancelled out automatically, and the required calibration time is lower than 10 ms.

Fully Integrated Biopotential Acquisition Analog Front-End IC.

A biopotential acquisition analog front-end (AFE) integrated circuit (IC) is presented. The biopotential AFE includes a capacitively coupled chopper instrumentation amplifier (CCIA) to achieve low input referred noise (IRN) and to block unwanted DC potential signals. A DC servo loop (DSL) is designed to minimize the offset voltage in the chopper amplifier and low frequency respiration artifacts. An AC coupled ripple rejection loop (RRL) is employed to reduce ripple due to chopper stabilization. A capacitive impedance boosting loop (CIBL) is designed to enhance the input impedance and common mode rejection ratio (CMRR) without additional power consumption, even under an external electrode mismatch. The AFE IC consists of two-stage CCIA that include three compensation loops (DSL, RRL, and CIBL) at each CCIA stage. The biopotential AFE is fabricated using a 0.18 µm one polysilicon and six metal layers (1P6M) complementary metal oxide semiconductor (CMOS) process. The core chip size of the AFE without input/output (I/O) pads is 10.5 mm². A fourth-order band-pass filter (BPF) with a pass-band in the band-width from 1 Hz to 100 Hz was integrated to attenuate unwanted signal and noise. The overall gain and band-width are reconfigurable by using programmable capacitors. The IRN is measured to be 0.94 µVRMS in the pass band. The maximum amplifying gain of the pass-band was measured as 71.9 dB. The CIBL enhances the CMRR from 57.9 dB to 67 dB at 60 Hz under electrode mismatch conditions.