ABSTRACT
Since ferroelectricity has been observed in simple binary oxide material systems, it has attracted great interest in semiconductor research fields such as advanced logic transistors, non-volatile memories, and neuromorphic devices. The location in which the ferroelectric devices are implemented depends on the specific application, so the process constraints required for device fabrication may be different. In this study, we investigate the ferroelectric characteristics of Zr doped HfO2 layers treated at high temperatures. A single HfZrOx layer deposited by sputtering exhibits polarization switching after annealing at a temperature of 850 °C. However, the achieved ferroelectric properties are vulnerable to voltage stress and higher annealing temperature, resulting in switching instability. Therefore, we introduce an ultrathin 1-nm-thick Al2O3 layer at both interfaces of the HfZrOx. The trilayer Al2O3/HfZrOx/Al2O3 structure allows switching parameters such as remnant and saturation polarizations to be immune to sweeping voltage and pulse cycling. Our results reveal that the trilayer not only makes the ferroelectric phase involved in the switching free from pinning, but also preserves the phase even at high annealing temperature. Simultaneously, the ferroelectric switching can be improved by preventing leakage charge.
ABSTRACT
A crossbar array architecture employing resistive switching memory (RRAM) as a synaptic element accelerates vector-matrix multiplication in a parallel fashion, enabling energy-efficient pattern recognition. To implement the function of the synapse in the RRAM, multilevel resistance states are required. More importantly, a large on/off ratio of the RRAM should be preferentially obtained to ensure a reasonable margin between each state taking into account the inevitable variability caused by the inherent switching mechanism. The on/off ratio is basically adjusted in two ways by modulating measurement conditions such as compliance current or voltage pulses modulation. The latter technique is not only more suitable for practical systems, but also can achieve multiple states in low current range. However, at the expense of applying a high negative voltage aimed at enlarging the on/off ratio, a breakdown of the RRAM occurs unexpectedly. This stuck-at-short fault of the RRAM adversely affects the recognition process based on reading and judging each column current changed by the multiplication of the input voltage and resistance of the RRAM in the array, degrading the accuracy. To address this challenge, we introduce a boost-factor adjustment technique as a fault-tolerant scheme based on simple circuitry that eliminates the additional process to identify specific locations of the failed RRAMs in the array. Spectre circuit simulation is performed to verify the effect of the scheme on Modified National Institute of Standards and Technology dataset using convolutional neural networks in non-ideal crossbar arrays, where experimentally observed imperfective RRAMs are configured. Our results show that the recognition accuracy can be maintained similar to the ideal case because the interruption of the failure is suppressed by the scheme.
