Theory and experimental verification of configurable computing with stochastic memristors.

The inevitable variability within electronic devices causes strict constraints on operation, reliability and scalability of the circuit design. However, when a compromise arises among the different performance metrics, area, time and energy, variability then loosens the tight requirements and allows for further savings in an alternative design scope. To that end, unconventional computing approaches are revived in the form of approximate computing, particularly tuned for resource-constrained mobile computing. In this paper, a proof-of-concept of the approximate computing paradigm using memristors is demonstrated. Stochastic memristors are used as the main building block of probabilistic logic gates. As will be shown in this paper, the stochasticity of memristors' switching characteristics is tightly bound to the supply voltage and hence to power consumption. By scaling of the supply voltage to appropriate levels stochasticity gets increased. In order to guide the design process of approximate circuits based on memristors a realistic device model needs to be elaborated with explicit emphasis of the probabilistic switching behavior. Theoretical formulation, probabilistic analysis, and simulation of the underlying logic circuits and operations are introduced. Moreover, the expected output behavior is verified with the experimental measurements of valence change memory cells. Hence, it is shown how the precision of the output is varied for the sake of the attainable gains at different levels of available design metrics. This approach represents the first proposition along with physical verification and mapping to real devices that combines stochastic memristors into unconventional computing approaches.

On the role of the metal oxide/reactive electrode interface during the forming procedure of valence change ReRAM devices.

One of the key issues of resistive switching memory devices is the so called "forming" process, a one time process at a high voltage, which initializes the resistive switching at significantly lower voltages. With this study we identify the influence of the different layers - namely the insulating oxide layer (ZrO2 and Ta2O5) and the reactive ohmic electrode layer (Hf, Ta and Pt) - on the forming voltage and the pristine capacitance of the devices. For this, the forming voltage and pristine capacitance is measured in dependence of the oxide layer thickness with different electrodes. The different slopes of the forming voltage - thickness relation for different top electrodes give an indication that the reactive ohmic electrode is oxidized from the oxide layer underneath and that the degree of the oxidation depends on the thickness of the oxide layer as well as the materials used for the oxide and electrode layer. This finding could be confirmed by X-ray photoelectron spectroscopy (XPS) and transmission electron microscopy (TEM) measurements. From the electrical measurements and the TEM images the thickness of the oxidized electrode layer could be estimated. The degree of the oxidation depends on the oxygen affinity of the oxide and electrode material. The interface dependent (thickness independent) part of the forming voltage is determined by the material of the electrode. The magnitude of this interface voltage could be correlated to the oxide free energy of the electrode material. These results can support the ongoing research towards resistive switching memory devices with a very low forming voltage or forming free behaviour.

Volatile HRS asymmetry and subloops in resistive switching oxides.

Current-voltage characteristics of oxide-based resistive switching memories often show a pronounced asymmetry with respect to the voltage polarity in the high resistive state (HRS), where the HRS after the RESET is more conducting than the one before the SET. Here, we report that most of this HRS asymmetry is a volatile effect as the HRS obtained from a read operation differs from the one taken from the switching cycle at identical polarity and voltages. Transitions between the relaxed and the volatile excited states can be achieved via voltage sweeps, which are named subloops. The excited states are stable over time as long as a voltage is applied to the device and have a higher conductance than the stable relaxed state. Experimental data on the time and voltage dependence of the excitation and decay are presented for Ta/TaOx/Pt and Ta/ZrOx/Pt devices. The effect is not limited to one oxide or electrode material but is observed with different magnitudes (up to 10× current change) in several oxide systems. These observations describe an additional state variable of the memristive system that is controlled in a highly polarity dependent manner.