ABSTRACT
The coming of the big-data era brought a need for power-efficient computing that cannot be realized in the Von Neumann architecture. Neuromorphic computing which is motivated by the human brain can greatly reduce power consumption through matrix multiplication, and a device that mimics a human synapse plays an important role. However, many synaptic devices suffer from limited linearity and symmetry without using incremental step pulse programming (ISPP). In this work, we demonstrated a charge-trap flash (CTF)-based synaptic transistor using trap-level engineered Al2O3/Ta2O5/Al2O3 gate stack for successful neuromorphic computing. This novel gate stack provided precise control of the conductance with more than 6 bits. We chose the appropriate bias for highly linear and symmetric modulation of conductance and realized it with very short (25 ns) identical pulses at low voltage, resulting in low power consumption and high reliability. Finally, we achieved high learning accuracy in the training of 60000 MNIST images.
ABSTRACT
HfO2-based ferroelectric (FE) materials have emerged as a promising material for non-volatile memory applications because of remanent polarization, scalability of thickness below 10 nm, and compatibility with complementary metal-oxide-semiconductor technology. However, in the metal/FE/insulator/semiconductor, it is difficult to improve switching voltage (V sw), endurance, and retention properties due to the interfacial layer (IL), which inevitably grows during the fabrication. Here, we proposed and demonstrated oxygen scavenging to reduce the IL thickness in an HfZrO x -based capacitor and the thinner IL was confirmed by cross-sectional transmission electron microscopy. V sw of a capacitor with scavenging decreased by 18% and the same P r could be obtained at a lower voltage than a capacitor without scavenging. In addition, excellent endurance properties up to 106 cycles were achieved. We believe oxygen scavenging has great potential for future HfZrO x -based memory device applications.
