Wafer-scale detachable monocrystalline germanium nanomembranes for the growth of III-V materials and substrate reuse.

Germanium (Ge) is increasingly used as a substrate for high-performance optoelectronics, photovoltaics, and electronic devices. These devices are usually grown on thick and rigid Ge substrates manufactured by classical wafering techniques. Nanomembranes (NMs) provide an alternative to this approach while offering wafer-scale lateral dimensions, weight reduction, waste limitation, and cost effectiveness. Herein, we introduce the Porous germanium Efficient Epitaxial LayEr Release (PEELER) process, which consists of the fabrication of wafer-scale detachable Ge NMs on porous Ge (PGe) and substrate reuse. We demonstrate the growth of Ge NMs with monocrystalline quality as revealed by high-resolution transmission electron microscopy (HRTEM) characterization. Together with the surface roughness below 1 nm, it makes the Ge NMs suitable for growth of III-V materials. Additionally, the embedded nanoengineered weak layer enables the detachment of the Ge NMs. Finally, we demonstrate the wet-etch-reconditioning process of the Ge substrate, allowing its reuse, to produce multiple free-standing NMs from a single parent wafer. The PEELER process significantly reduces the consumption of Ge in the fabrication process, paving the way for a new generation of low-cost flexible optoelectronic devices.

Assessing charge carrier trapping in silicon nanowires using picosecond conductivity measurements.

Free-standing semiconductor nanowires on bulk substrates are increasingly being explored as building blocks for novel optoelectronic devices such as tandem solar cells. Although carrier transport properties, such as mobility and trap densities, are essential for such applications, it has remained challenging to quantify these properties. Here, we report on a method that permits the direct, contact-free quantification of nanowire carrier diffusivity and trap densities in thin (∼25 nm wide) silicon nanowires-without any additional processing steps such as transfer of wires onto a substrate. The approach relies on the very different terahertz (THz) conductivity response of photoinjected carriers within the silicon nanowires from those in the silicon substrate. This allows quantifying both the picosecond dynamics and the efficiency of charge carrier transport from the silicon nanowires into the silicon substrate. Varying the excitation density allows for quantification of nanowire trap densities: for sufficiently low excitation fluences the diffusion process stalls because the majority of charge carriers become trapped at nanowire surface defects. Using a model that includes these effects, we determine both the diffusion constant and the nanowire trap density. The trap density is found to be orders of magnitude larger than the charge carrier density that would be generated by AM1.5 sunlight.