Synthesis of Vacancy-Controlled Copper Iodide Semiconductor for High-Performance p-Type Thin-Film Transistors.

Copper iodide (CuI) has emerged as a promising p-type semiconductor material owing to its excellent carrier mobility, high transparency, and solution processability. Although CuI has potential for numerous applications, including perovskite solar cells, photovoltaic devices, and thin-film transistors (TFTs), the close relationship between the anion vacancy generation and the charge transport mechanism in CuI-based devices is underexplored. In this study, we propose solution-processed p-type CuI TFTs which were subject to the thermal annealing process in air and vacuum atmospheres at temperatures of 100, 200, and 300 °C. The chemical states and surface morphologies of the CuI thin films were systematically investigated, revealing the generation of iodine vacancy states and the reduction of carrier concentration, as well as increased film density and grain size according to the annealing condition. Further, the effective role of the Al2O3 passivation layer on the electrical characteristics of the solution-processed CuI TFTs is demonstrated for the first time, where the Al2O3 precursor greatly enhanced the electrical performance of the CuI TFTs, exhibiting a field-effect mobility of 4.02 cm2/V·s, a subthreshold swing of 0.61 V/decade, and an on/off current ratio of 1.12 × 104, which exceed the values of CuI TFTs reported so far. Based on the synergistic effects of the annealing process and the passivation layer that engineered the iodine vacancy state and morphology of CuI, the proposed CuI TFTs with the Al2O3 passivation layer showed excellent reliability under 100 times repeated operation and long-term stability over 216 h, where the transfer curves slightly shifted in the positive direction of 1.36 and 1.88 V measured at a current level of 10-6 A for the reliability and stability tests, respectively. Thus, this work opens a new window for solution-processed p-type CuI TFTs with excellent stability for developing next-generation complementary logic circuits.

Effects of Capping Layers with Different Metals on Electrical Performance and Stability of p-Channel SnO Thin-Film Transistors.

In this study, the effects of capping layers with different metals on the electrical performance and stability of p-channel SnO thin-film transistors (TFTs) were examined. Ni- or Pt-capped SnO TFTs exhibit a higher field-effect mobility (µFE), a lower subthreshold swing (SS), a positively shifted threshold voltage (VTH), and an improved negative-gate-bias-stress (NGBS) stability, as compared to pristine TFTs. In contrast, Al-capped SnO TFTs exhibit a lower µFE, higher SS, negatively shifted VTH, and degraded NGBS stability, as compared to pristine TFTs. No significant difference was observed between the electrical performance of the Cr-capped SnO TFT and that of the pristine SnO TFT. The obtained results were primarily explained based on the change in the back-channel potential of the SnO TFT that was caused by the difference in work functions between the SnO and various metals. This study shows that capping layers with different metals can be practically employed to modulate the electrical characteristics of p-channel SnO TFTs.

Floating Ni Capping for High-Mobility p-Channel SnO Thin-Film Transistors.

We utilized Ni as a floating capping layer in p-channel SnO thin-film transistors (TFTs) to improve their electrical performances. By utilizing the Ni as a floating capping layer, the p-channel SnO TFT showed enhanced mobility as high as 10.5 cm2·V-1·s-1. The increase in mobility was more significant as the length of Ni capping layer increased and the thickness of SnO active layer decreased. The observed phenomenon was possibly attributed to the changed vertical electric field distribution and increased hole concentration in the SnO channel by the floating Ni capping layer. Our experimental results demonstrate that incorporating the floating Ni capping layer on the channel layer is an effective method for increasing the field-effect mobility in p-channel SnO TFTs.

Oxide Thin-Film Transistor-Based Vertically Stacked Complementary Inverter for Logic and Photo-Sensor Operations.

Numerous studies have addressed the utilization of oxide thin-film transistor (TFT)-based complementary logic circuits that are based on two-dimensional (2D) planar structures. However, there are fundamental limits to the 2D planar structured complementary logic circuits, such as a large dimension and a large parasitic resistance. This work demonstrated a vertically stacked three-dimensional complementary inverter composed of a p-channel tin monoxide (SnO) TFT and an n-channel indium-gallium-zinc oxide (IGZO) TFT. A bottom-gate p-channel SnO TFT was formed on the top-gate n-channel IGZO TFT with a shared common gate electrode. The fabricated vertically stacked complementary inverter exhibited full swing characteristics with a voltage gain of ~33.6, a high noise margin of 3.13 V, and a low noise margin of 3.16 V at a supplied voltage of 10 V. The achieved voltage gain of the fabricated complementary inverter was higher than that of the vertically stacked complementary inverters composed of other oxide TFTs in previous works. In addition, we showed that the vertically stacked complementary inverter exhibited excellent visible-light photoresponse. This indicates that the oxide TFT-based vertically stacked complementary inverter can be used as a sensitive photo-sensor operating in the visible spectral range with the voltage read-out scheme.

Effect of Simultaneous Mechanical and Electrical Stress on the Electrical Performance of Flexible In-Ga-Zn-O Thin-Film Transistors.

We investigated the effect of simultaneous mechanical and electrical stress on the electrical characteristics of flexible indium-gallium-zinc oxide (IGZO) thin-film transistors (TFTs). The IGZO TFTs exhibited a threshold voltage shift (∆VTH) under an application of positive-bias-stress (PBS), with a turnaround behavior from the positive ∆VTH to the negative ∆VTH with an increase in the PBS application time, whether a mechanical stress is applied or not. However, the magnitudes of PBS-induced ∆VTH in both the positive and negative directions exhibited significantly larger values when a flexible IGZO TFT was under mechanical-bending stress than when it was at the flat state. The observed phenomena were possibly attributed to the mechanical stress-induced interface trap generation and the enhanced hydrogen diffusion from atomic layer deposition-grown Al2O3 to IGZO under mechanical-bending stress during PBS. The subgap density of states was extracted before and after an application of PBS under both mechanical stress conditions. The obtained results in this study provided potent evidence supporting the mechanism suggested to explain the PBS-induced larger ∆VTHs in both directions under mechanical-bending stress.

Study on the Lateral Carrier Diffusion and Source-Drain Series Resistance in Self-Aligned Top-Gate Coplanar InGaZnO Thin-Film Transistors.

We investigated the lateral distribution of the equilibrium carrier concentration (n0) along the channel and the effects of channel length (L) on the source-drain series resistance (Rext) in the top-gate self-aligned (TG-SA) coplanar structure amorphous indium-gallium-zinc oxide (a-IGZO) thin-film transistors (TFTs). The lateral distribution of n0 across the channel was extracted using the paired gate-to-source voltage (VGS)-based transmission line method and the temperature-dependent transfer characteristics obtained from the TFTs with different Ls. n0 abruptly decreased with an increase in the distance from the channel edge near the source/drain junctions; however, much smaller gradient of n0 was observed in the region near the middle of the channel. The effect of L on the Rext in the TG-SA coplanar a-IGZO TFT was investigated by applying the drain current-conductance method to the TFTs with various Ls. The increase of Rext was clearly observed with an increase in L especially at low VGSs, which was possibly attributed to the enhanced carrier diffusion near the source/drain junctions due to the larger gradient of the carrier concentration in the longer channel devices. Because the lateral carrier diffusion and the relatively high Rext are the critical issues in the TG-SA coplanar structure-based oxide TFTs, the results in this work are expected to be useful in further improving the electrical performance and uniformity of the TG-SA coplanar structure oxide TFTs.

High-performance and scalable metal-chalcogenide semiconductors and devices via chalco-gel routes.

We report a general strategy for obtaining high-quality, large-area metal-chalcogenide semiconductor films from precursors combining chelated metal salts with chalcoureas or chalcoamides. Using conventional organic solvents, such precursors enable the expeditious formation of chalco-gels, which are easily transformed into the corresponding high-performance metal-chalcogenide thin films with large, uniform areas. Diverse metal chalcogenides and their alloys (MQ x : M = Zn, Cd, In, Sb, Pb; Q = S, Se, Te) are successfully synthesized at relatively low processing temperatures (<400°C). The versatility of this scalable route is demonstrated by the fabrication of large-area thin-film transistors (TFTs), optoelectronic devices, and integrated circuits on a 4-inch Si wafer and 2.5-inch borosilicate glass substrates in ambient air using CdS, CdSe, and In2Se3 active layers. The CdSe TFTs exhibit a maximum field-effect mobility greater than 300 cm2 V-1 s-1 with an on/off current ratio of >107 and good operational stability (threshold voltage shift < 0.5 V at a positive gate bias stress of 10 ks). In addition, metal chalcogenide-based phototransistors with a photodetectivity of >1013 Jones and seven-stage ring oscillators operating at a speed of ~2.6 MHz (propagation delay of < 27 ns per stage) are demonstrated.

Wide-spectral/dynamic-range skin-compatible phototransistors enabled by floated heterojunction structures with surface functionalized SWCNTs and amorphous oxide semiconductors.

Purified semiconducting single-walled carbon nanotubes (sc-SWCNTs) have been researched for optoelectronic applications due to their high absorption coefficient from the visible to even the near-infrared (NIR) region. Nevertheless, the insufficient electrical characteristics and incompatibility with conventional CMOS processing have limited their wide utilization in this emerging field. Here, we demonstrate highly detective and wide spectral/dynamic range phototransistors incorporating floated heterojunction active layers which are composed of low-temperature sol-gel processed n-type amorphous indium gallium zinc oxide (a-IGZO) stacked with a purified p-type sc-SWCNT layer. To achieve a high and broad spectral/dynamic range photo-response of the heterogeneous transistors, photochemically functionalized sc-SWCNT layers were carefully implemented onto the a-IGZO channel area with a floating p-n heterojunction active layer, resulting in the suppression of parasitic charge leakage and good bias driven opto-electrical properties. The highest photosensitivity (R) of 9.6 × 102 A W-1 and a photodetectivity (D*) of 4 × 1014 Jones along with a dynamic range of 100-180 dB were achieved for our phototransistor in the spectral range of 400-780 nm including continuous and minimal frequency independent behaviors. More importantly, to demonstrate the diverse application of the ultra-flexible hybrid photosensor platform as skin compatible electronics, the sc-SWCNT/a-IGZO phototransistors were fabricated on an ultra-thin (∼1 µm) polyimide film along with a severe static and dynamic electro-mechanical test. The skin-like phototransistors showed excellent mechanical stability such as sustainable good electrical performance and high photosensitivity in a wide dynamic range without any visible cracks or damage and little noise interference after being rolled-up on the 150 µm-thick optical fiber as well as more than 1000 times cycling.

Electrical instability of high-mobility zinc oxynitride thin-film transistors upon water exposure.

We investigate the effects of water absorption on the electrical performance and stability in high-mobility zinc oxynitride (ZnON) thin-film transistors (TFTs). The ZnON TFT exhibits a smaller field-effect mobility, lower turn-on voltage, and higher subthreshold slope with a deteriorated electrical stability under positive gate bias stresses after being exposed to water. From the Hall measurements, an increase of the electron concentration and a decrease of the Hall mobility are observed in the ZnON thin film after water absorption. The observed phenomena are mainly attributed to the water molecule-induced increase of the defective ZnXNY bond and the oxygen vacancy inside the ZnON thin film based on the x-ray photoelectron spectroscopy analysis.

Water-Mediated Photochemical Treatments for Low-Temperature Passivation of Metal-Oxide Thin-Film Transistors.

The low-temperature electrical passivation of an amorphous oxide semiconductor (AOS) thin-film transistor (TFT) is achieved by a deep ultraviolet (DUV) light irradiation-water treatment-DUV irradiation (DWD) method. The water treatment of the first DUV-annealed amorphous indium-gallium-zinc-oxide (a-IGZO) thin film is likely to induce the preferred adsorption of water molecules at the oxygen vacancies and leads to subsequent hydroxide formation in the bulk a-IGZO films. Although the water treatment initially degraded the electrical performance of the a-IGZO TFTs, the second DUV irradiation on the water-treated devices may enable a more complete metal-oxygen-metal lattice formation while maintaining low oxygen vacancies in the oxide films. Overall, the stable and dense metal-oxygen-metal (M-O-M) network formation could be easily achieved at low temperatures (below 150 °C). The successful passivation of structural imperfections in the a-IGZO TFTs, such as hydroxyl group (OH-) and oxygen vacancies, mainly results in the enhanced electrical performances of the DWD-processed a-IGZO TFTs (on/off current ratio of 8.65 × 10(9), subthreshold slope of 0.16 V/decade, an average mobility of >6.94 cm(2) V(-1) s(-1), and a bias stability of ΔVTH < 2.5 V), which show more than a 30% improvement over the simple DUV-treated a-IGZO TFTs.

Investigation of Intrinsic Electrical Characteristics and Contact Effects in p-Type Tin Monoxide Thin-Film Transistors Using Gated-Four-Probe Measurements.

We investigate the intrinsic electrical characteristics and source/drain parasitic resistance in p-type SnO TFTs fabricated using Ni electrodes based on the gated-four-probe method. Because of the relatively high work function and inexpensive price, Ni has been most frequently used as the source/drain electrode materials in p-type SnO TFTs. However, our experimental data shows that the width normalized parasitic resistances of SnO TFT with Ni electrodes are around one to three orders of magnitude higher than those in the representative n-type oxide TFT, amorphous indium- gallium-zinc oxide TFT, and are comparable with those in amorphous silicon TFTs with Mo electrodes. This result implies that the electrical performance of the short channel SnO TFT can be dominated by the source/drain parasitic resistances. The intrinsic field-effect mobility extracted without being influenced by source/drain parasitic resistance was ~2.0 cm2/Vs, which is around twice the extrinsic field-effect mobility obtained from the conventional transconductance method. The large contact resistance is believed to be mainly caused from the heterogeneous electronic energy-level mismatch between the SnO and Ni electrodes.