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1.
ACS Appl Mater Interfaces ; 15(34): 40330-40342, 2023 Aug 30.
Article in English | MEDLINE | ID: mdl-37599432

ABSTRACT

Integrating different components into a heterostructure is a novel approach that increases the number of active centers to enhance the catalytic activities of a catalyst. This study uses an efficient, facile hydrothermal strategy to synthesize a unique heterostructure of copper cobalt sulfide and tungsten disulfide (CuCo2S4-WS2) nanowires on a Ni foam (NF) substrate. The nanowire arrays (CuCo2S4-WS2/NF) with multiple integrated active sites exhibit small overpotentials of 202 (299) and 240 (320) mV for HER and OER at 20 (50) mA cm-2 and 1.54 V (10 mA cm-2) for an electrolyzer in 1.0 M KOH, surpassing commercial and previously reported catalysts. A solar electrolyzer composed of CuCo2S4-WS2 bifunctional electrodes also produced significant amounts of hydrogen through a water splitting process. The remarkable performance is accredited to the extended electroactive surface area, reasonable density of states near the Fermi level, optimal adsorption free energies, and good charge transfer ability, further validating the excellent dual function of CuCo2S4-WS2/NF in electrochemical water splitting.

2.
ACS Appl Mater Interfaces ; 14(28): 32261-32269, 2022 Jul 20.
Article in English | MEDLINE | ID: mdl-35797493

ABSTRACT

Neuromorphic devices have been extensively studied to overcome the limitations of a von Neumann system for artificial intelligence. A synaptic device is one of the most important components in the hardware integration for a neuromorphic system because a number of synaptic devices can be connected to a neuron with compactness as high as possible. Therefore, synaptic devices using silicon-based memory, which are advantageous for a high packing density and mass production due to matured fabrication technologies, have attracted considerable attention. In this study, a segmented transistor devoted to an artificial synapse is proposed for the first time to improve the linearity of the potentiation and depression (P/D). It is a complementary metal oxide semiconductor (CMOS)-compatible device that harnesses both non-ohmic Schottky junctions of the source and drain for improved weight linearity and double-layered nitride for enhanced speed. It shows three distinct and unique segments in drain current-gate voltage transfer characteristics induced by Schottky junctions. In addition, the different stoichiometries of SixNy for a double-layered nitride is utilized as a charge trap layer for boosting the operation speed. This work can bring the industry potentially one step closer to realizing the mass production of hardware-based synaptic devices in the future.

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