Demonstration of a multichannel optical interconnection by use of imaging fiber bundles butt coupled to optoelectronic circuits.

Through five experiments, we demonstrate and characterize the basic functionality of imaging fiber bundles for optoelectronic chip-level interconnections. We demonstrate the transmission of spot arrays with spot sizes and a spot pitch roughly equal to 2 and 4 times the core pitch, respectively. We show that optoelectronic integrated circuits, including sources and detectors, can be butt coupled directly to fiber bundles without any additional optical elements. We demonstrate a 16-channel interconnect with -23 dB of cross talk, and we characterize the most significant optical loss mechanism. Finally, we show how imaging fiber bundles can be used to implement more complex interconnection structures by an example of a hybrid-bonded structure that implements a low-cost, high-connectivity solution for more advanced system architectures.

Computer-aided design for optoelectronic systems: introduction to the feature issue.

Welcome to the first special issue of Applied Optics on computer-aided design for optoelectronic systems. This special issue stemmed from our realization of the need for dialogue between optoelectronic system designers and computer-aided-design developers, as well as from the realization that various research groups are developing or, in some instances, have already developed and commercialized such tools. Our goal for this special issue is to enhance this type of dialogue by showing to the optoelectronic system design community the current state of optoelectronic computer-aided-design tools.

Chatoyant: a computer-aided- design tool for free-space optoelectronic systems.

Chatoyant is a tool for the simulation and the analysis of heterogeneous free-space optoelectronic architectures. It is capable of modeling digital and analog electronic and optical signal propagation with mechanical tolerancing at the system level. We present models for a variety of optoelectronic devices and results that demonstrate the system's ability to predict the effects of various component parameters, such as detector geometry, and system parameters, such as alignment tolerances, on system-performance measures, such as the bit-error rate.

Optoelectronic-cache memory system architecture.

We present an investigation of the architecture of an optoelectronic cache that can integrate terabit optical memories with the electronic caches associated with high-performance uniprocessors and multiprocessors. The use of optoelectronic-cache memories enables these terabit technologies to provide transparently low-latency secondary memory with frame sizes comparable with disk pages but with latencies that approach those of electronic secondary-cache memories. This enables the implementation of terabit memories with effective access times comparable with the cycle times of current microprocessors. The cache design is based on the use of a smart-pixel array and combines parallel free-space optical input-output to-and-from optical memory with conventional electronic communication to the processor caches. This cache and the optical memory system to which it will interface provide a large random-access memory space that has a lower overall latency than that of magnetic disks and disk arrays. In addition, as a consequence of the high-bandwidth parallel input-output capabilities of optical memories, fault service times for the optoelectronic cache are substantially less than those currently achievable with any rotational media.

Locality-based control algorithms for reconfigurable optical interconnection networks.

Hybrid optoelectronic computing structures are required for providing the information processing capabilities for the next generation of computing and communications systems. Reconfigurable optoelectronic interconnection networks are networks constructed of optical waveguides in which messages are switched or routed by means of optoelectronic devices. For these networks, the dichotomy between the bandwidth of the optical channels that carry messages and the performance of the electronic controllers and decoders that determine the routing and destination of those messages is a significant bottleneck. We introduce a class of routing algorithms for reconfigurable networks that is designed to bridge this gap in optical versus electronic performance. The algorithms are based on a new control paradigm that exploits the locality in multiprocessor communication streams to reduce the control latency inherent in reconfigurable interconnection structures. In addition, we show that this problem maps directly to the problem of page replacement in a virtual-memory hierarchy. Thus our solution is well suited to networks for multiprocessor applications.

Coincident pulse techniques for multiprocessor interconnection structures.

We present several optical interconnection structures which support communication requirements unique to multiprocessor systems, namely, broadcasting, multicasting, simulcasting, and multiport memory access. The structures are based on guided wave time division multiplexed channels and use coincident pulse techniques to optically demultiplex individual bits at selected destinations. We describe 1-and 2-D structures which are appropriate for processor to processor interconnections and for processor to memory interconnections, respectively.