Toward human-like adaptability in robotics through a retention-engineered synaptic control system.

Although advanced robots can adeptly mimic human movement and aesthetics, they are still unable to adapt or evolve in response to external experiences. To address this limitation, we propose an innovative approach that uses parallel-processable retention-engineered synaptic devices in the control system. This approach aims to simulate a human-like learning system without necessitating complex computational systems. The retention properties of the synaptic devices were modulated by adjusting the amount of Ag/AgCl ink sprayed. This changed the voltage drop across the interface between the gate electrode and the electrolyte. Furthermore, the unrestricted movement of ions in the electrolyte enhanced the signal multiplexing capability of the ion gel, enabling device-level parallel processing. By integrating the unique characteristics of the synaptic devices with actuators, we successfully emulated a human-like workout process that includes feedback between acute and chronic responses. The proposed control system offers an innovative approach to reducing system complexity and achieving a human-like learning system in the field of biomimicry.

Defect-Engineered Semiconducting van der Waals Thin Film at Metal-Semiconductor Interface of Field-Effect Transistors.

The significance of metal-semiconductor interfaces and their impact on electronic device performance have gained increasing attention, with a particular focus on investigating the contact metal. However, another avenue of exploration involves substituting the contact metal at the metal-semiconductor interface of field-effect transistors with semiconducting layers to introduce additional functionalities to the devices. Here, a scalable approach for fabricating metal-oxide-semiconductor (channel)-semiconductor (interfacial layer) field-effect transistors is proposed by utilizing solution-processed semiconductors, specifically semiconducting single-walled carbon nanotubes and molybdenum disulfide, as the channel and interfacial semiconducting layers, respectively. The work function of the interfacial MoS2 is modulated by controlling the sulfur vacancy concentration through chemical treatment, which results in distinctive energy band alignments within a single device configuration. The resulting band alignments lead to multiple functionalities, including multivalued transistor characteristics and multibit nonvolatile memory (NVM) behavior. Moreover, leveraging the stable NVM properties, we demonstrate artificial synaptic devices with 88.9% accuracy of MNIST image recognition.

Monolithic Tandem Vertical Electrochemical Transistors for Printed Multi-Valued Logic.

Organic electrochemical transistors (OECTs) have recently emerged as a feasible candidate to realize the next generation of printable electronics. Especially, their chemical versatility and the unique redox-based operating principle have provided new possibilities in high-functioning logic circuitry beyond the traditional binary Boolean logic. Here, a simple strategy to electrochemically realize monolithic multi-valued logic transistors is presented, which is one of the most promising branches of transistor technology in the forthcoming era of hyper Moore's law. A vertically stacked heterogeneous dual-channel architecture is introduced with a patterned reference electrode, which enables a facile manifestation of stable and equiprobable ternary logic states with a reduced transistor footprint. The dual-ion-penetration mechanism coupled with ultrashort vertical channel even allows a very-high accessing frequency to multiple logic states reaching over 10 MHz. Furthermore, printed arrays of ternary logic gates with full voltage swing within 1 V are demonstrated.

Area-Selective Chemical Doping on Solution-Processed MoS2 Thin-Film for Multi-Valued Logic Gates.

Multi-valued logic gates are demonstrated on solution-processed molybdenum disulfide (MoS2) thin films. A simple chemical doping process is added to the conventional transistor fabrication procedure to locally increase the work function of MoS2 by decreasing sulfur vacancies. The resulting device exhibits pseudo-heterojunctions comprising as-processed MoS2 and chemically treated MoS2 (c-MoS2). The energy-band misalignment of MoS2 and c-MoS2 results in a sequential activation of the MoS2 and c-MoS2 channel areas under a gate voltage sweep, which generates a stable intermediate state for ternary operation. Current levels and turn-on voltages for each state can be tuned by modulating the device geometries, including the channel thickness and length. The optimized ternary transistors are incorporated to demonstrate various ternary logic gates, including the inverter, NMIN, and NMAX gates.

All-Solution-Processed Van der Waals Heterostructures for Wafer-Scale Electronics.

2D van der Waals (vdW) materials have been considered as potential building blocks for use in fundamental elements of electronic and optoelectronic devices, such as electrodes, channels, and dielectrics, because of their diverse and remarkable electrical properties. Furthermore, two or more building blocks of different electronic types can be stacked vertically to generate vdW heterostructures with desired electrical behaviors. However, such fundamental approaches cannot directly be applied practically because of issues such as precise alignment/positioning and large-quantity material production. Here, these limitations are overcome and wafer-scale vdW heterostructures are demonstrated by exploiting the lateral and vertical assembly of solution-processed 2D vdW materials. The high exfoliation yield of the molecular intercalation-assisted approach enables the production of micrometer-sized nanosheets in large quantities and its lateral assembly in a wafer-scale via vdW interactions. Subsequently, the laterally assembled vdW thin-films are vertically assembled to demonstrate various electronic device applications, such as transistors and photodetectors. Furthermore, multidimensional vdW heterostructures are demonstrated by integrating 1D carbon nanotubes as a p-type semiconductor to fabricate p-n diodes and complementary logic gates. Finally, electronic devices are fabricated via inkjet printing as a lithography-free manner based on the stable nanomaterial dispersions.

Multi-State Heterojunction Transistors Based on Field-Effect Tunneling-Transport Transitions.

A monolithic ternary logic transistor based on a vertically stacked double n-type semiconductor heterostructure is presented. Incorporation of the organic heterostructure into the conventional metal-oxide-semiconductor field-effect transistor (MOSFET) architecture induces the generation of stable multiple logic states in the device; these states can be further optimized to be equiprobable and distinctive, which are the most desirable and requisite properties for multivalued logic devices. A systematic investigation reveals that the electrical properties of the device are governed by not only the conventional field-effect charge transport but also the field-effect charge tunneling at the heterointerfaces, and thus, an intermediate state can be finely tuned by independently controlling the transition between the onsets of these two mechanisms. The achieved device performance agrees with the results of a numerical simulation based on a pseudo-metal-insulator-metal model; the obtained findings therefore provide rational criteria for material selection in a simple energetic perspective. The operation of various ternary logic circuits based on the optimized multistate heterojunction transistors, including the NMIN and NMAX gates, is also demonstrated.

Cold-Trap-Mediated Broad Dynamic Photodetection in Graphene-Organic Hybrid Photonic Barristors.

One of the most popular approaches to improve the performance of organic photonic devices has been to control the electrically heterogeneous charge-transferring interfaces via chemical modifications. Despite intense research efforts, however, the rapid pace of material evolution through the chemical versatility of the organic compound allows only limited room for the fine-tuning of the interfaces exclusive to specific materials. This limitation leads to an ill-controlled charge recombination behavior that relies solely on the inherent characteristics of each material; thus, the common device architecture cannot harness its full potential. In this work, we demonstrate the use of a graphene-organic hybrid barristor-type phototriode architecture as an alternative platform to realize a linearly and highly photosensitive photodetector operating in a broad dynamic range with rapid temporal responses. With the capability of interfacial energetic modulation, our model system exhibits the dominance of swiftly saturable and slowly responding "cold" traps (TC < 3kT) in charge recombination behaviors, leading to a broad linear dynamic range of 110 dB as well as unconventional illumination-driven increments of both D* and R up to 1013 Jones and 360 mA/W, respectively, that surpass the best-reported organic photodiodes. Our findings demonstrate that the organic-graphene hybrid photonic barristor architecture can open new avenues to design high-performance photodetectors for various photonic applications in the future.

Percolation-Limited Dual Charge Transport in Vertical p-n Heterojunction Schottky Barrier Transistors.

Solution-processed, high-speed, and polarity-selective organic vertical Schottky barrier (SB) transistors and logic gates are presented. The organic layer, which is a bulk heterojunction (BHJ) composed of PBDB-T and PC71BM, is employed to simultaneously realize vertical electron and hole transports through the separate p-channel and n-channel. The gate-modulated graphene work functions enable broad modulation of SB heights at both the graphene-PBDB-T and graphene-PC71BM heterointerfaces. Interestingly, the fine-tuned energy-level alignment enables an exclusive injection of holes or electrons unlike conventional BHJ-based ambipolar transistors, leading to a clear transition between p-channel and n-channel single-carrier-like transistor characteristics. Furthermore, the improved percolation-limited dual charge transport in vertical architecture results in high charge carrier density and high-speed on-off switching characteristics, providing a high on-off current ratio exceeding 105 and an operation speed of 100 kHz. Solution-based on-substrate fabrications of low-power complementary logic gates such as NOT, NOR, and NAND are also successfully performed.

All-Inkjet-Printed Vertical Heterostructure for Wafer-Scale Electronics.

In this study, we fabricated an array of all-inkjet-printed vertical Schottky barrier (SB) transistors and various logic gates on a large-area substrate. All of the electronic components, including the indium-gallium-zinc-oxide (IGZO) semiconductor, reduced graphene oxide (rGO), and indium-tin-oxide (ITO) electrodes, and the ion-gel gate dielectric, were directly and uniformly printed onto a 4 in. wafer. The vertical SB transistors had a vertically stacked structure, with the inkjet-printed IGZO semiconductor layer placed between the rGO source electrode and the ITO drain electrode. The ion-gel gate dielectric was also inkjet-printed in a coplanar gate geometry. The channel current was controlled by adjusting the SB height at the rGO/IGZO heterojunction under application of an external gate voltage. The high intrinsic capacitance of the ion-gel gate dielectric facilitated modulation of the SB height at the source/channel heterojunction to around 0.5 eV at a gate voltage lower than 2 V. The resulting vertical SB transistors exhibited a high current density of 2.0 A·cm-2, a high on-off current ratio of 106, and excellent operational and environmental stabilities. The simple device structure of the vertical SB transistors was beneficial for the fabrication of all-inkjet-printed low-power logic circuits such as the NOT, NAND, and NOR gates on a large-area substrate.

A Nonchlorinated Solvent-Processable Fluorinated Planar Conjugated Polymer for Flexible Field-Effect Transistors.

High carrier mobilities have recently been achieved in polymer field effect transistors (FETs). However, many of these polymer FET devices require the use of chlorinated solvents such as chloroform (CF), chlorobenzene (CB), and o-dichlorobenzene (DCB) during fabrication. The use of these solvents is highly restricted in industry because of health and environmental issues. Here, we report the synthesis of a low band gap (1.43 eV, 870 nm) semiconducting polymer (PDPP2DT-F2T2) having a planar geometry, which can be readily processable with nonchlorinated solvents such as toluene (TOL), o-xylene (XY), and 1,2,4-trimethylbenzene (TMB). We performed structural characterization of PDPP2DT-F2T2 films prepared from different solvents, and the electrical properties of the films were measured in the context of FETs. The devices exhibited an ambipolar behavior with hole dominant transport. Hole mobilities increased with increasing boiling point (bp) of the nonchlorinated solvents: 0.03, 0.05, and 0.10 cm2 V-1 s-1 for devices processed using TOL, XY, and TMB, respectively. Thermal annealing further improved the FET performance. TMB-based polymer FETs annealed at 200 °C yielded a maximum hole mobility of 1.28 cm2 V-1 s-1, which is far higher than the 0.43 cm2 V-1 s-1 obtained from the CF-based device. This enhancement was attributed to increased interchain interactions as well as improved long-range interconnection between fibrous domains. Moreover, all of the nonchlorinated solutions generated purely edge-on orientations of the polymer chains, which is highly beneficial for carrier transport in FET devices. Furthermore, we fabricated an array of flexible TMB-processed PDPP2DT-F2T2 FETs on the plastic PEN substrates. These devices demonstrated excellent carrier mobilities and negligible degradation after 300 bending cycles. Overall, we demonstrated that the organized assembly of polymer chains can be achieved by slow drying using high bp nonchlorinated solvents and a post thermal treatment. Furthermore, we showed that polymer FETs processed using high bp nonhalogenated solvents may outperform those processed using halogenated solvents.