Tailoring amorphous boron nitride for high-performance two-dimensional electronics.

Two-dimensional (2D) materials have garnered significant attention in recent years due to their atomically thin structure and unique electronic and optoelectronic properties. To harness their full potential for applications in next-generation electronics and photonics, precise control over the dielectric environment surrounding the 2D material is critical. The lack of nucleation sites on 2D surfaces to form thin, uniform dielectric layers often leads to interfacial defects that degrade the device performance, posing a major roadblock in the realization of 2D-based devices. Here, we demonstrate a wafer-scale, low-temperature process (<250 °C) using atomic layer deposition (ALD) for the synthesis of uniform, conformal amorphous boron nitride (aBN) thin films. ALD deposition temperatures between 125 and 250 °C result in stoichiometric films with high oxidative stability, yielding a dielectric strength of 8.2 MV/cm. Utilizing a seed-free ALD approach, we form uniform aBN dielectric layers on 2D surfaces and fabricate multiple quantum well structures of aBN/MoS2 and aBN-encapsulated double-gated monolayer (ML) MoS2 field-effect transistors to evaluate the impact of aBN dielectric environment on MoS2 optoelectronic and electronic properties. Our work in scalable aBN dielectric integration paves a way towards realizing the theoretical performance of 2D materials for next-generation electronics.

In situ axially doped n-channel silicon nanowire field-effect transistors.

Axially doped (n+-p--n+) silicon nanowires were synthesized using the vapor-liquid-solid technique by sequentially modulating the introduction of phosphine to the inlet gas stream during growth from a silane source gas. Top-gate and wrap-around-gate metal oxide semiconductor field-effect transistors that were fabricated after thermal oxidation of the silicon nanowires operate by electron inversion of the p- body segment and have significantly higher on-state current and on-to-off state current ratios than do uniformly p- -doped nanowire field-effect devices. The effective electron mobility of the devices was estimated using a four-point top-gate structure that excludes the source and drain contact resistance and was found to follow the expected universal inversion layer mobility versus effective electric field trend. The field-effect properties of wrap-around-gate devices are less sensitive to global-back-gate bias and thus provide better electrostatic control of the nanowire channel. These results demonstrate the ability to tailor the axial doping profile of silicon nanowires for future planar and vertical nanoelectronic applications.

Selective plating for junction delineation in silicon nanowires.

The in situ growth of p-n junctions in silicon nanowires enables the fabrication of a variety of nanoscale electronic devices. We have developed a method for selective coating of Au onto n-type segments of silicon nanowire p-n junctions. Selective plating allows for quick verification of the position of p-n junctions along the nanowire using electron microscopy and allows for measurement of segment length.

Silicidation of silicon nanowires by platinum.

The solid-state reaction between platinum and silicon nanowires grown by the vapor-liquid-solid technique was studied. The reaction product PtSi is an attractive candidate for contacts to p-type silicon nanowires due to the low barrier height of PtSi contacts to p-type Si in the planar geometry, and the formation of PtSi was the motivation for our study. Silicidation was carried out by annealing Pt on Si nanowires from 250 to 700 degrees C, and the reaction products were characterized by transmission electron microscopy. Strikingly different morphologies of the reacted nanowires were observed depending on the annealing temperature, platinum film thickness, silicon nanowire diameter, and level of unintentional oxygen contamination in the annealing furnace. Conversion to PtSi was successfully realized by annealing above 400 degrees C in purified N2 gas. A uniform morphology was achieved for nanowires with an appropriate combination of Si nanowire diameter and Pt film thickness to form PtSi without excess Pt or Si. Similar to the planar silicidation process, oxygen affects the nanowire silicidation process greatly.