ABSTRACT
Topological crystalline insulators (TCIs) are interesting for their topological surface states, which hold great promise for scattering-free transport channels and fault-tolerant quantum computing. A promising TCI is SnTe. However, Sn-vacancies form in SnTe, causing a high hole density, hindering topological transport from the surface being measured. This issue could be relieved by using nanowires with a high surface-to-volume ratio. Furthermore, SnTe can be alloyed with Pb reducing the Sn-vacancies while maintaining its topological phase. Here we present the catalyst-free growth of monocrystalline PbSnTe in molecular beam epitaxy. By the addition of a pre-deposition stage before the growth, we have control over the nucleation phase and thereby increase the nanowire yield. This facilitates tuning the nanowire aspect ratio by a factor of four by varying the growth parameters. These results allow us to grow specific morphologies for future transport experiments to probe the topological surface states in a Pb1-xSnxTe-based platform.
ABSTRACT
Semiconductor nanowire (NW) quantum devices offer a promising path for the pursuit and investigation of topologically-protected quantum states, and superconducting and spin-based qubits that can be controlled using electric fields. Theoretical investigations into the impact of disorder on the attainment of dependable topological states in semiconducting nanowires with large spin-orbit coupling andg-factor highlight the critical need for improvements in both growth processes and nanofabrication techniques. In this work, we used a hybrid lithography tool for both the high-resolution thermal scanning probe lithography and high-throughput direct laser writing of quantum devices based on thin InSb nanowires with contact spacing of 200 nm. Electrical characterization demonstrates quasi-ballistic transport. The methodology outlined in this study has the potential to reduce the impact of disorder caused by fabrication processes in quantum devices based on 1D semiconductors.
