ABSTRACT
A W-band integer-N phase-locked loop (PLL) for a frequency hopping frequency modulation continuous wave (FMCW) radar is implemented in 65-nm CMOS technology. The cross-coupled voltage-controlled oscillator (VCO) was designed based on a systematic analysis of the VCO combined with its push-pull buffer to achieve high efficiency and high output power. To provide a frequency hopping functionality without any overhead in the implementation, the center frequency of the VCO is steeply controlled by the gate voltage of the buffer, which effectively modifies the susceptance of the VCO load. A stand-alone VCO with the proposed architecture is fabricated, and it achieves an output power of 13.5 dBm, a peak power efficiency of 9.6%, and a tuning range of 3.5%. The phase noise performance of the VCO is -92.6 dBc/Hz at 1-MHz and -106.1 dBc/Hz at 10 MHz offset. Consisting of a third-order loop filter and a divider chain with a total modulus of 48, the locking range of the implemented PLL with the cross-coupled VCO is recorded from 78.84 GHz to 84 GHz, and its phase noise is -85.2 dBc/Hz at 1-MHz offset.
ABSTRACT
We present an X-band bi-directional transmit/receive module (TRM) for a phased array system utilized in radar-based sensor systems. The proposed module, comprising a 6-bit phase shifter, a 6-bit digital step attenuator, and bi-directional gain amplifiers, is fabricated using 65-nm CMOS technology. By constructing passive networks in the phase-shifter and the variable attenuator, the implemented TRM provides amplitude and phase control with 360° phase coverage and 5.625° as the minimum step size while the attenuation range varies from 0 to 31.5 dB with a step size of 0.5 dB. The fabricated T/R module in all of the phase shift states had RMS phase errors of less than 4° and an RMS amplitude error of less than 0.93 dB at 9â»11 GHz. The output 1dB gain compression point (OP1dB) of the chip was 5.13 dBm at 10 GHz. The circuit occupies 3.92 × 2.44 mm² of the chip area and consumes 170 mW of DC power.
