ABSTRACT
It is well-known that microbiota dysbiosis is closely associated with numerous diseases in the human body. The oral cavity and gut are the two largest microbial habitats, playing a major role in microbiome-associated diseases. Even though the oral cavity and gut are continuous regions connected through the gastrointestinal tract, the oral and gut microbiome profiles are well-segregated due to the oral-gut barrier. However, the oral microbiota can translocate to the intestinal mucosa in conditions of the oral-gut barrier dysfunction. Inversely, the gut-to-oral microbial transmission occurs as well in inter- and intrapersonal manners. Recently, it has been reported that oral and gut microbiomes interdependently regulate physiological functions and pathological processes. Oral-to-gut and gut-to-oral microbial transmissions can shape and/or reshape the microbial ecosystem in both habitats, eventually modulating pathogenesis of disease. However, the oral-gut microbial interaction in pathogenesis has been underappreciated to date. Here, we will highlight the oral-gut microbiome crosstalk and its implications in the pathogenesis of the gastrointestinal disease and cancer. Better understanding the role of the oral-gut microbiome axis in pathogenesis will be advantageous for precise diagnosis/prognosis and effective treatment.
ABSTRACT
Recently, stereo matching processors have been adopted in real-time embedded systems such as intelligent robots and autonomous vehicles, which require minimal hardware resources and low power consumption. Meanwhile, thanks to the through-silicon via (TSV), three-dimensional (3D) stacking technology has emerged as a practical solution to achieving the desired requirements of a high-performance circuit. In this paper, we present the benefits of 3D stacking and process technology scaling on stereo matching processors. We implemented 2-tier 3D-stacked stereo matching processors with GlobalFoundries 130-nm and Nangate 45-nm process design kits and compare them with their two-dimensional (2D) counterparts to identify comprehensive design benefits. In addition, we examine the findings from various analyses to identify the power benefits of 3D-stacked integrated circuit (IC) and device technology advancements. From experiments, we observe that the proposed 3D-stacked ICs, compared to their 2D IC counterparts, obtain 43% area, 13% power, and 14% wire length reductions. In addition, we present a logic partitioning method suitable for a pipeline-based hardware architecture that minimizes the use of TSVs.
