High-performance superconducting quantum processors via laser annealing of transmon qubits.

Scaling the number of qubits while maintaining high-fidelity quantum gates remains a key challenge for quantum computing. Presently, superconducting quantum processors with >50 qubits are actively available. For these systems, fixed-frequency transmons are attractive because of their long coherence and noise immunity. However, scaling fixed-frequency architectures proves challenging because of precise relative frequency requirements. Here, we use laser annealing to selectively tune transmon qubits into desired frequency patterns. Statistics over hundreds of annealed qubits demonstrate an empirical tuning precision of 18.5 MHz, with no measurable impact on qubit coherence. We quantify gate error statistics on a tuned 65-qubit processor, with median two-qubit gate fidelity of 98.7%. Baseline tuning statistics yield a frequency-equivalent resistance precision of 4.7 MHz, sufficient for high-yield scaling beyond 103 qubit levels. Moving forward, we anticipate selective laser annealing to play a central role in scaling fixed-frequency architectures.

Ultralow crosstalk nanosecond-scale nested 2 × 2 Mach-Zehnder silicon photonic switch.

We present the design and characterization of a novel electro-optic silicon photonic 2×2 nested Mach-Zehnder switch monolithically integrated with a CMOS driver and interface logic. The photonic device uses a variable optical attenuator in order to balance the power inside the Mach-Zehnder interferometer leading to ultralow crosstalk performance. We measured a crosstalk as low as -34.5 dB, while achieving ∼2 dB insertion loss and 4 ns transient response.

Sub-bandgap polysilicon photodetector in zero-change CMOS process for telecommunication wavelength.

We report a defect state based guided-wave photoconductive detector at 1360-1630 nm telecommunication wavelength directly in standard microelectronics CMOS processes, with zero in-foundry process modification. The defect states in the polysilicon used to define a transistor gate assists light absorption. The body crystalline silicon helps form an inverse ridge waveguide to confine optical mode. The measured responsivity and dark current at 25 V forward bias are 0.34 A/W and 1.4 µA, respectively. The 3 dB bandwidth of the device is 1 GHz.

Single-chip microprocessor that communicates directly using light.

Data transport across short electrical wires is limited by both bandwidth and power density, which creates a performance bottleneck for semiconductor microchips in modern computer systems--from mobile phones to large-scale data centres. These limitations can be overcome by using optical communications based on chip-scale electronic-photonic systems enabled by silicon-based nanophotonic devices. However, combining electronics and photonics on the same chip has proved challenging, owing to microchip manufacturing conflicts between electronics and photonics. Consequently, current electronic-photonic chips are limited to niche manufacturing processes and include only a few optical devices alongside simple circuits. Here we report an electronic-photonic system on a single chip integrating over 70 million transistors and 850 photonic components that work together to provide logic, memory, and interconnect functions. This system is a realization of a microprocessor that uses on-chip photonic devices to directly communicate with other chips using light. To integrate electronics and photonics at the scale of a microprocessor chip, we adopt a 'zero-change' approach to the integration of photonics. Instead of developing a custom process to enable the fabrication of photonics, which would complicate or eliminate the possibility of integration with state-of-the-art transistors at large scale and at high yield, we design optical devices using a standard microelectronics foundry process that is used for modern microprocessors. This demonstration could represent the beginning of an era of chip-scale electronic-photonic systems with the potential to transform computing system architectures, enabling more powerful computers, from network infrastructure to data centres and supercomputers.

High-Q CMOS-integrated photonic crystal microcavity devices.

Integrated optical resonators are necessary or beneficial in realizations of various functions in scaled photonic platforms, including filtering, modulation, and detection in classical communication systems, optical sensing, as well as addressing and control of solid state emitters for quantum technologies. Although photonic crystal (PhC) microresonators can be advantageous to the more commonly used microring devices due to the former's low mode volumes, fabrication of PhC cavities has typically relied on electron-beam lithography, which precludes integration with large-scale and reproducible CMOS fabrication. Here, we demonstrate wavelength-scale polycrystalline silicon (pSi) PhC microresonators with Qs up to 60,000 fabricated within a bulk CMOS process. Quasi-1D resonators in lateral p-i-n structures allow for resonant defect-state photodetection in all-silicon devices, exhibiting voltage-dependent quantum efficiencies in the range of a few 10 s of %, few-GHz bandwidths, and low dark currents, in devices with loaded Qs in the range of 4,300-9,300; one device, for example, exhibited a loaded Q of 4,300, 25% quantum efficiency (corresponding to a responsivity of 0.31 A/W), 3 GHz bandwidth, and 30 nA dark current at a reverse bias of 30 V. This work demonstrates the possibility for practical integration of PhC microresonators with active electro-optic capability into large-scale silicon photonic systems.

Polycrystalline silicon ring resonator photodiodes in a bulk complementary metal-oxide-semiconductor process.

We present measurements on resonant photodetectors utilizing sub-bandgap absorption in polycrystalline silicon ring resonators, in which light is localized in the intrinsic region of a p+/p/i/n/n+ diode. The devices, operating both at λ=1280 and λ=1550 nm and fabricated in a complementary metal-oxide-semiconductor (CMOS) dynamic random-access memory emulation process, exhibit detection quantum efficiencies around 20% and few-gigahertz response bandwidths. We observe this performance at low reverse biases in the range of a few volts and in devices with dark currents below 50 pA at 10 V. These results demonstrate that such photodetector behavior, previously reported by Preston et al. [Opt. Lett. 36, 52 (2011)], is achievable in bulk CMOS processes, with significant improvements with respect to the previous work in quantum efficiency, dark current, linearity, bandwidth, and operating bias due to additional midlevel doping implants and different material deposition. The present work thus offers a robust realization of a fully CMOS-fabricated all-silicon photodetector functional across a wide wavelength range.

Depletion-mode carrier-plasma optical modulator in zero-change advanced CMOS.

We demonstrate the first (to the best of our knowledge) depletion-mode carrier-plasma optical modulator fabricated in a standard advanced complementary metal-oxide-semiconductor (CMOS) logic process (45 nm node SOI CMOS) with no process modifications. The zero-change CMOS photonics approach enables this device to be monolithically integrated into state-of-the-art microprocessors and advanced electronics. Because these processes support lateral p-n junctions but not efficient ridge waveguides, we accommodate these constraints with a new type of resonant modulator. It is based on a hybrid microring/disk cavity formed entirely in the sub-90 nm thick monocrystalline silicon transistor body layer. Electrical contact of both polarities is made along the inner radius of the multimode ring cavity via an array of silicon spokes. The spokes connect to p and n regions formed using transistor well implants, which form radially extending lateral junctions that provide index modulation. We show 5 Gbps data modulation at 1265 nm wavelength with 5.2 dB extinction ratio and an estimated 40 fJ/bit energy consumption. Broad thermal tuning is demonstrated across 3.2 THz (18 nm) with an efficiency of 291 GHz/mW. A single postprocessing step to remove the silicon handle wafer was necessary to support low-loss optical confinement in the device layer. This modulator is an important step toward monolithically integrated CMOS photonic interconnects.

Depletion-mode polysilicon optical modulators in a bulk complementary metal-oxide semiconductor process.

We demonstrate depletion-mode carrier-plasma optical modulators fabricated in a bulk complementary metal-oxide semiconductor (CMOS), DRAM-emulation process. To the best of our knowledge, these are the first depletion-mode modulators demonstrated in polycrystalline silicon and in bulk CMOS. The modulators are based on novel optical microcavities that utilize periodic spatial interference of two guided modes to create field nulls along waveguide sidewalls. At these nulls, electrical contacts can be placed while preserving a high optical Q. These cavities enable active devices in a process with no partial silicon etch and with lateral p-n junctions. We demonstrate two device variants at 5 Gbps data modulation rate near 1610 nm wavelength. One design shows 3.1 dB modulation depth with 1.5 dB insertion loss and an estimated 160 fJ/bit energy consumption, while a more compact device achieves 4.2 dB modulation depth with 4.0 dB insertion loss and 60 fJ/bit energy consumption. These modulators represent a significant breakthrough in enabling active photonics in bulk silicon CMOS--the platform of the majority of microelectronic logic and DRAM processes--and lay the groundwork for monolithically integrated CMOS-to-DRAM photonic links.

Open foundry platform for high-performance electronic-photonic integration.

This paper presents photonic devices with 3 dB/cm waveguide loss fabricated in an existing commercial electronic 45 nm SOI-CMOS foundry process. By utilizing existing front-end fabrication processes the photonic devices are monolithically integrated with electronics in the same physical device layer as transistors achieving 4 ps logic stage delay, without degradation in transistor performance. We demonstrate an 8-channel optical microring-resonator filter bank and optical modulators, both controlled by integrated digital circuits. By developing a device design methodology that requires zero process infrastructure changes, a widely available platform for high-performance photonic-electronic integrated circuits is enabled.

Photonic ADC: overcoming the bottleneck of electronic jitter.

Accurate conversion of wideband multi-GHz analog signals into the digital domain has long been a target of analog-to-digital converter (ADC) developers, driven by applications in radar systems, software radio, medical imaging, and communication systems. Aperture jitter has been a major bottleneck on the way towards higher speeds and better accuracy. Photonic ADCs, which perform sampling using ultra-stable optical pulse trains generated by mode-locked lasers, have been investigated for many years as a promising approach to overcome the jitter problem and bring ADC performance to new levels. This work demonstrates that the photonic approach can deliver on its promise by digitizing a 41 GHz signal with 7.0 effective bits using a photonic ADC built from discrete components. This accuracy corresponds to a timing jitter of 15 fs - a 4-5 times improvement over the performance of the best electronic ADCs which exist today. On the way towards an integrated photonic ADC, a silicon photonic chip with core photonic components was fabricated and used to digitize a 10 GHz signal with 3.5 effective bits. In these experiments, two wavelength channels were implemented, providing the overall sampling rate of 2.1 GSa/s. To show that photonic ADCs with larger channel counts are possible, a dual 20-channel silicon filter bank has been demonstrated.

Low-loss polysilicon waveguides fabricated in an emulated high-volume electronics process.

We measure end-of-line polysilicon waveguide propagation losses of ~6-15 dB/cm across the telecommunication O-, E-, S-, C- and L-bands in a process representative of high-volume product integration. The lowest loss of 6.2 dB/cm is measured at 1550 nm in a polysilicon waveguide with a 120 nm x 350 nm core geometry. The reported waveguide characteristics are measured after the thermal cycling of the full CMOS electronics process that results in a 32% increase in the extracted material loss relative to the as-crystallized waveguide samples. The measured loss spectra are fit to an absorption model using defect state parameters to identify the dominant loss mechanism in the end-of-line and as-crystallized polysilicon waveguides.

Nanophotonic integration in state-of-the-art CMOS foundries.

We demonstrate a monolithic photonic integration platform that leverages the existing state-of-the-art CMOS foundry infrastructure. In our approach, proven XeF2 post-processing technology and compliance with electronic foundry process flows eliminate the need for specialized substrates or wafer bonding. This approach enables intimate integration of large numbers of nanophotonic devices alongside high-density, high-performance transistors at low initial and incremental cost. We demonstrate this platform by presenting grating-coupled, microring-resonator filter banks fabricated in an unmodified 28 nm bulk-CMOS process by sharing a mask set with standard electronic projects. The lithographic fidelity of this process enables the high-throughput fabrication of second-order, wavelength-division-multiplexing (WDM) filter banks that achieve low insertion loss without post-fabrication trimming.

Effect of carrier lifetime on forward-biased silicon Mach-Zehnder modulators.

We present a systematic study of Mach-Zehnder silicon optical modulators based on carrier-injection. Detailed comparisons between modeling and measurement results are made with good agreement obtained for both DC and AC characteristics. A figure of merit, static VpiL, as low as 0.24Vmm is achieved. The effect of carrier lifetime variation with doping concentration is explored and found to be important for the modulator characteristics.