Design considerations for refractive solid immersion lens: application to subsurface integrated circuit fault localization using laser induced techniques.

With fast scaling and advancement of integrated circuit (IC) technology, circuitries have become smaller and denser. New materials and more sophisticated designs have evolved. These changes reduced the effectiveness of conventional laser induced fault localization techniques. Since IC fault localization is the most critical step in failure analysis, there are strong motivations to improve both spatial resolution and sensitivity of such systems to meet the new challenges from advanced technology. Refractive solid immersion lens (RSIL) is well known to enhance the laser spot size which directly affects resolution and sensitivity in back side fault localizations. In practice, it is difficult to operate RSIL at the ideal configurations to obtain the smallest spot resolution. It is necessary to understand the resolution performance at the other design focal planes. Besides resolution, there are also other factors that affect sensitivity in a RSIL enhanced system. This paper identifies and characterizes key RSIL design parameters to optimize RSIL performance on laser induced techniques. We report that the most efficient conditions are achieved close to aplanatic RSIL design to within 20-25 microm (for a 1 mm diameter lens), and the backing objective should be the minimum numerical aperture required for optimum resolution performance. The size of the mechanical clear aperture opening should be large enough (>80%) to exploit the advantage of aplanatic RSIL. RSIL is developed on a laser scanning optical microscope in this work, and a resolution of 0.3 microm (for a wavelength of 1340 nm) was achieved over a range of operating conditions. A quantitative resolution of 0.25 microm is achieved and a pitch structure of 0.4 microm is easily resolvable. Close to 15 times enhancement in laser induced signal is obtained.

Automatic integrated circuit die positioning in the scanning electron microscope.

In scanning electron microscope (SEM)-based integrated circuit (IC) failure analysis, there is often a need for manual location of a prespecified failure site in several ICs. Such a procedure is both tedious and time consuming. This paper presents a new vision-based die positioning system that can automatically locate a specified failure site without the need for a high-accuracy specimen stage. Depending on the appearance of the desired failure site, the system applies either image registration or feature tracking to locate the site. Experiments performed on a variety of IC samples show that the system is able to locate the failure site accurately, even in the presence of unfavorable conditions such as IC sample rotation and repetitive IC patterns.