Performance Analysis of Orthogonal Multiplexing Techniques for PLC Systems with Low Cyclic Prefix Length and Symbol Timing Offset.

This paper investigates the degradation caused by interference resulting from cyclic prefix violation and symbol timing offset in narrowband power line communication systems. In this sense, it presents a unified formulation from which Hermitian symmetric orthogonal frequency division multiplexing (HS-OFDM), orthogonal chirp division multiplexing (OCDM), single-carrier cyclic prefix (SCCP), and orthogonal time-frequency division multiplexing (OTFDM) can be easily derived. The paper then provides closed-form expressions for quantifying the aforementioned interference in the presence of a frequency domain equalizer. The numerical analyses exhibit the performances of these schemes under various data communication conditions, such as the availability of channel state information, the presence or absence of interference, modeling of additive noise as a white or colored Gaussian random process, frequency domain equalizer type, and the use of bit and power allocation techniques. The closed-form expressions and performance analyses regarding achievable data rate and bit error probability provide guidance for dealing with distinct constraints in narrowband power line communication (PLC) systems using the HS-OFDM, OCDM, SCCP, or OTFDM scheme. Lastly, the unified formulation and results obtained motivate the design of multi-scheme transceivers.

A Notch Filter-Based Coupling Circuit for UNB and NB PLC Systems.

This paper introduces an analog notch filtering-based coupling circuit for receivers in ultra-narrowband and narrowband power line communication systems, which are connected to low-voltage electric power grids. It is composed of a twin-T notch analog filter, which is responsible for imposing a significant attenuation on the main frequency (i.e., f0∈{50,60} Hz) in cascade with an elliptic low-pass analog filter, designed with a 3 dB cut-off frequency of fc≫f0. For f0=60 Hz and fc=2 MHz, the prototype of the analog notch filtering-based coupling circuit attains attenuation values of 22 dB and less than 2 dB at the main frequency and in the rest of the frequency bandwidth, respectively, when practical scenarios are considered. Lastly, it shows that the analog notch filtering-based coupling circuit is more effective than a typical capacitive coupling circuit when frequencies lower than 3 kHz are considered for data communication and sensing purposes.

A System-on-a-Chip Implementation of a Post-Quantum Cryptography Scheme for Smart Meter Data Communications.

The security of Smart Meter (SM) systems will be a challenge in the era of quantum computing because a quantum computer might exploit characteristics of well-established cryptographic schemes to reach a successful security breach. From a practical perspective, this paper focuses on the feasibility of implementing a quantum-secure lattice-based key encapsulation mechanism in a SM, hardware-constrained equipment. In this regard, the post-quantum cryptography (PQC) scheme, FrodoKEM, an alternate candidate for the National Institute for Standards and Technology (NIST) post-quantum standardization process, is implemented using a System-on-a-Chip (SoC) device in which the Field Programmable Gate Array (FPGA) component is exploited to accelerate the most time-consuming routines in this scheme. Experimental results show that the execution time to run the FrodoKEM scheme in an SoC device reduces to one-third of that obtained by the benchmark implementation (i.e., the software implementation). Also, the attained execution time and hardware resource usage of this SoC-based implementation of the FrodoKEM scheme show that lattice-based cryptography may fit into SM equipment.