Memristive tonotopic mapping with volatile resistive switching memory devices.

To reach the energy efficiency and the computing capability of biological neural networks, novel hardware systems and paradigms are required where the information needs to be processed in both spatial and temporal domains. Resistive switching memory (RRAM) devices appear as key enablers for the implementation of large-scale neuromorphic computing systems with high energy efficiency and extended scalability. Demonstrating a full set of spatiotemporal primitives with RRAM-based circuits remains an open challenge. By taking inspiration from the neurobiological processes in the human auditory systems, we develop neuromorphic circuits for memristive tonotopic mapping via volatile RRAM devices. Based on a generalized stochastic device-level approach, we demonstrate the main features of signal processing of cochlea, namely logarithmic integration and tonotopic mapping of signals. We also show that our tonotopic classification is suitable for speech recognition. These results support memristive devices for physical processing of temporal signals, thus paving the way for energy efficient, high density neuromorphic systems.

Reservoir Computing with Charge-Trap Memory Based on a MoS2 Channel for Neuromorphic Engineering.

Novel memory devices are essential for developing low power, fast, and accurate in-memory computing and neuromorphic engineering concepts that can compete with the conventional complementary metal-oxide-semiconductor (CMOS) digital processors. 2D semiconductors provide a novel platform for advanced semiconductors with atomic thickness, low-current operation, and capability of 3D integration. This work presents a charge-trap memory (CTM) device with a MoS2 channel where memory operation arises, thanks to electron trapping/detrapping at interface states. Transistor operation, memory characteristics, and synaptic potentiation/depression for neuromorphic applications are demonstrated. The CTM device shows outstanding linearity of the potentiation by applied drain pulses of equal amplitude. Finally, pattern recognition is demonstrated by reservoir computing where the input pattern is applied as a stimulation of the MoS2 -based CTMs, while the output current after stimulation is processed by a feedforward readout network. The good accuracy, the low current operation, and the robustness to input random bit flip makes the CTM device a promising technology for future high-density neuromorphic computing concepts.

A CMOS-memristor hybrid system for implementing stochastic binary spike timing-dependent plasticity.

This paper describes a fully experimental hybrid system in which a [Formula: see text] memristive crossbar spiking neural network (SNN) was assembled using custom high-resistance state memristors with analogue CMOS neurons fabricated in 180 nm CMOS technology. The custom memristors used NMOS selector transistors, made available on a second 180 nm CMOS chip. One drawback is that memristors operate with currents in the micro-amperes range, while analogue CMOS neurons may need to operate with currents in the pico-amperes range. One possible solution was to use a compact circuit to scale the memristor-domain currents down to the analogue CMOS neuron domain currents by at least 5-6 orders of magnitude. Here, we proposed using an on-chip compact current splitter circuit based on MOS ladders to aggressively attenuate the currents by over 5 orders of magnitude. This circuit was added before each neuron. This paper describes the proper experimental operation of an SNN circuit using a [Formula: see text] 1T1R synaptic crossbar together with four post-synaptic CMOS circuits, each with a 5-decade current attenuator and an integrate-and-fire neuron. It also demonstrates one-shot winner-takes-all training and stochastic binary spike-timing-dependent-plasticity learning using this small system. This article is part of the theme issue 'Advanced neurotechnologies: translating innovation for health and well-being'.

In materia reservoir computing with a fully memristive architecture based on self-organizing nanowire networks.

Neuromorphic computing aims at the realization of intelligent systems able to process information similarly to our brain. Brain-inspired computing paradigms have been implemented in crossbar arrays of memristive devices; however, this approach does not emulate the topology and the emergent behaviour of biological neuronal circuits, where the principle of self-organization regulates both structure and function. Here, we report on in materia reservoir computing in a fully memristive architecture based on self-organized nanowire networks. Thanks to the functional synaptic connectivity with nonlinear dynamics and fading memory properties, the designless nanowire complex network acts as a network-wide physical reservoir able to map spatio-temporal inputs into a feature space that can be analysed by a memristive resistive switching memory read-out layer. Computing capabilities, including recognition of spatio-temporal patterns and time-series prediction, show that the emergent memristive behaviour of nanowire networks allows in materia implementation of brain-inspired computing paradigms characterized by a reduced training cost.