Defect-tolerant demultiplexer circuits based on threshold logic and coding.

A defect-tolerant design is presented for a demultiplexer circuit that is based on threshold logic. The design uses coding both to handle (i.e., tolerate) defects in the circuit and to improve the voltage margin in its gates. The following model is assumed for the defects: configured junctions can become either stuck open or stuck closed, and non-configured junctions can become shorted. Two realizations of the circuit are presented: one using conventional transistor circuitry, and the other using nanoscale components and wiring. The design presented in this paper demonstrates how a standard digital building-block circuit-a demultiplexer-can be efficiently protected against several types of defect simultaneously.

Resistor-logic demultiplexers for nanoelectronics based on constant-weight codes.

The voltage margin of a resistor-logic demultiplexer can be improved significantly by basing its connection pattern on a constant-weight code. Each distinct code determines a unique demultiplexer, and therefore a large family of circuits is defined. We consider using these demultiplexers for building nanoscale crossbar memories, and determine the voltage margin of the memory system based on a particular code. We determine a purely code-theoretic criterion for selecting codes that will yield memories with large voltage margins, which is to minimize the ratio of the maximum to the minimum Hamming distance between distinct codewords. For the specific example of a 64 × 64 crossbar, we discuss what codes provide optimal performance for a memory.