Formulation and Emulation of Quantum-Inspired Dynamical Systems With Classical Analog Circuits.

Quantum dynamical systems are capable of powerful computation but are hard to emulate on digital computers. We show that four novel analog circuit parts can emulate the phase-coherent unitary dynamics of such systems. These four parts are: a Planck capacitance analogous to a neuronal membrane capacitance; a quantum admittance element, together with the Planck capacitance, analogous to a neuronal quadrature oscillator; a quantum transadmittance element analogous to a complex neuronal synapse; and a quantum transadmittance mixer element analogous to a complex neuronal synapse with resonant modulation. These parts may be emulated classically, with paired real-value voltages on paired Planck capacitances corresponding to the real and imaginary portions of a probability amplitude; and appropriate paired real-value currents onto these Planck capacitances corresponding to diagonal (admittance), off-diagonal (transadmittance), or controlled off-diagonal (transadmittance mixer) Hamiltonian energy terms. The superposition of 2n simultaneously phase-coherent and symmetric probability-voltage amplitudes with O(n) of these parts, in a tensor-product architecture enables analog emulation of the quantum Fourier transform (QFT). Implementation of our circuits on an analog integrated circuit in a 0.18 µm process yield experimental results consistent with mathematical theory and computer simulations for emulations of NMR, Josephson junction, and QFT dynamics. Our results suggest that linear oscillatory neuronal networks with pairs of complex subthreshold/nonspiking sine and cosine neurons that are coupled together via complex synapses to other such complex neurons can architect quantum-inspired computation with classical analog circuits. Thus, an analog-circuit mapping between quantum and neural computation, both of which exploit analog computation for powerful operation, can enable future synergies between these fields.

Analog synthetic biology.

We analyse the pros and cons of analog versus digital computation in living cells. Our analysis is based on fundamental laws of noise in gene and protein expression, which set limits on the energy, time, space, molecular count and part-count resources needed to compute at a given level of precision. We conclude that analog computation is significantly more efficient in its use of resources than deterministic digital computation even at relatively high levels of precision in the cell. Based on this analysis, we conclude that synthetic biology must use analog, collective analog, probabilistic and hybrid analog-digital computational approaches; otherwise, even relatively simple synthetic computations in cells such as addition will exceed energy and molecular-count budgets. We present schematics for efficiently representing analog DNA-protein computation in cells. Analog electronic flow in subthreshold transistors and analog molecular flux in chemical reactions obey Boltzmann exponential laws of thermodynamics and are described by astoundingly similar logarithmic electrochemical potentials. Therefore, cytomorphic circuits can help to map circuit designs between electronic and biochemical domains. We review recent work that uses positive-feedback linearization circuits to architect wide-dynamic-range logarithmic analog computation in Escherichia coli using three transcription factors, nearly two orders of magnitude more efficient in parts than prior digital implementations.

An articulatory silicon vocal tract for speech and hearing prostheses.

We describe the concept of a bioinspired feedback loop that combines a cochlear processor with an integrated-circuit vocal tract to create what we call a speech-locked loop. We discuss how the speech-locked loop can be applied in hearing prostheses, such as cochlear implants, to help improve speech recognition in noise. We also investigate speech-coding strategies for brain-machine-interface-based speech prostheses and present an articulatory speech-synthesis system by using an integrated-circuit vocal tract that models the human vocal tract. Our articulatory silicon vocal tract makes the transmission of low bit-rate speech-coding parameters feasible over a bandwidth-constrained body sensor network. To the best of our knowledge, this is the first articulatory speech-prosthesis system reported to date. We also present a speech-prosthesis simulator as a means to generate realistic articulatory parameter sequences.

A low-power 32-channel digitally programmable neural recording integrated circuit.

We report the design of an ultra-low-power 32-channel neural-recording integrated circuit (chip) in a 0.18 µ m CMOS technology. The chip consists of eight neural recording modules where each module contains four neural amplifiers, an analog multiplexer, an A/D converter, and a serial programming interface. Each amplifier can be programmed to record either spikes or LFPs with a programmable gain from 49-66 dB. To minimize the total power consumption, an adaptive-biasing scheme is utilized to adjust each amplifier's input-referred noise to suit the background noise at the recording site. The amplifier's input-referred noise can be adjusted from 11.2 µVrms (total power of 5.4 µW) down to 5.4 µVrms (total power of 20 µW) in the spike-recording setting. The ADC in each recording module digitizes the a.c. signal input to each amplifier at 8-bit precision with a sampling rate of 31.25 kS/s per channel, with an average power consumption of 483 nW per channel, and, because of a.c. coupling, allows d.c. operation over a wide dynamic range. It achieves an ENOB of 7.65, resulting in a net efficiency of 77 fJ/State, making it one of the most energy-efficient designs for neural recording applications. The presented chip was successfully tested in an in vivo wireless recording experiment from a behaving primate with an average power dissipation per channel of 10.1 µ W. The neural amplifier and the ADC occupy areas of 0.03 mm(2) and 0.02 mm(2) respectively, making our design simultaneously area efficient and power efficient, thus enabling scaling to high channel-count systems.

An ultra-low-power pulse oximeter implemented with an energy-efficient transimpedance amplifier.

Pulse oximeters are ubiquitous in modern medicine to noninvasively measure the percentage of oxygenated hemoglobin in a patient's blood by comparing the transmission characteristics of red and infrared light-emitting diode light through the patient's finger with a photoreceptor. We present an analog single-chip pulse oximeter with 4.8-mW total power dissipation, which is an order of magnitude below our measurements on commercial implementations. The majority of this power reduction is due to the use of a novel logarithmic transimpedance amplifier with inherent contrast sensitivity, distributed amplification, unilateralization, and automatic loop gain control. The transimpedance amplifier, together with a photodiode current source, form a high-performance photoreceptor with characteristics similar to those found in nature, which allows LED power to be reduced. Therefore, our oximeter is well suited for portable medical applications, such as continuous home-care monitoring for elderly or chronic patients, emergency patient transport, remote soldier monitoring, and wireless medical sensing. Furthermore, our design obviates the need for an A-to-D and digital signal processor and leads to a small single-chip solution. We outline how extensions of our work could lead to submilliwatt oximeters.

A micropower electrocardiogram amplifier.

We introduce an electrocardiogram (EKG) preamplifier with a power consumption of 2.8 muW, 8.1 muVrms input-referred noise, and a common-mode rejection ratio of 90 dB. Compared to previously reported work, this amplifier represents a significant reduction in power with little compromise in signal quality. The improvement in performance may be attributed to many optimizations throughout the design including the use of subthreshold transistor operation to improve noise efficiency, gain-setting capacitors versus resistors, half-rail operation wherever possible, optimal power allocations among amplifier blocks, and the sizing of devices to improve matching and reduce noise. We envision that the micropower amplifier can be used as part of a wireless EKG monitoring system powered by rectified radio-frequency energy or other forms of energy harvesting like body vibration and body heat.

An analog integrated-circuit vocal tract.

We present the first experimental integrated-circuit vocal tract by mapping fluid volume velocity to current, fluid pressure to voltage, and linear and nonlinear mechanical impedances to linear and nonlinear electrical impedances. The 275 muW analog vocal tract chip includes a 16-stage cascade of two-port pi-elements that forms a tunable transmission line, electronically variable impedances, and a current source as the glottal source. A nonlinear resistor models laminar and turbulent flow in the vocal tract. The measured SNR at the output of the analog vocal tract is 64, 66, and 63 dB for the first three formant resonances of a vocal tract with uniform cross-sectional area. The analog vocal tract can be used with auditory processors in a feedback speech locked loop-analogous to a phase locked loop-to implement speech recognition that is potentially robust in noise. Our use of a physiological model of the human vocal tract enables the analog vocal tract chip to synthesize speech signals of interest, using articulatory parameters that are intrinsically compact and linearly interpolatable.

Power-efficient impedance-modulation wireless data links for biomedical implants.

We analyze the performance of wireless data telemetry links for implanted biomedical systems. An experimental realization of a bidirectional half-duplex link that uses near-field inductive coupling between the implanted system and an external transceiver is described. Our system minimizes power consumption in the implanted system by using impedance modulation to transmit high-bandwidth information in the uplink direction, i.e., from the implanted to the external system. We measured a data rate of 2.8 Mbps at a bit error rate (BER) of <10(-6) (we could not measure error rates below 10(-6) ) and a data rate of 4.0 Mbps at a BER of 10(-3). Experimental results also demonstrate data transfer rates up to 300 kbps in the opposite, i.e., downlink direction. We also perform a theoretical analysis of the bit error rate performance. An important effect regarding the asymmetry of rising and falling edges that is inherent to impedance modulation is predicted by theory and confirmed by experiment. The link dissipates 2.5 mW in the external system and only 100 muW in the implanted system, making it among the most power-efficient inductive data links reported. Our link is compatible with FCC regulations on radiated emissions.

Feedback analysis and design of RF power links for low-power bionic systems.

This paper presents a feedback-loop technique for analyzing and designing RF power links for transcutaneous bionic systems, i.e., between an external RF coil and an internal RF coil implanted inside the body. The feedback techniques shed geometric insight into link design and minimize algebraic manipulations. We demonstrate that when the loop transmission of the link's feedback loop is -1, the link is critically coupled, i.e., the magnitude of the voltage transfer function across the link is maximal. We also derive an optimal loading condition that maximizes the energy efficiency of the link and use it as a basis for our link design. We present an example of a bionic implant system designed for load power consumptions in the 1-10-mW range, a low-power regime not significantly explored in prior designs. Such low power levels add to the challenge of link efficiency, because the overhead associated with switching losses in power amplifiers at the link input and with rectifiers at the link output significantly degrade link efficiency. We describe a novel integrated Class-E power amplifier design that uses a simple control strategy to minimize such losses. At 10-mW load power consumption, we measure overall link efficiencies of 74% and 54% at 1- and 10-mm coil separations, respectively, in good agreement with our theoretical predictions of the link's efficiency. At 1-mW load power consumption, we measure link efficiencies of 67% and 51% at 1- and 10-mm coil separations, respectively, also in good accord with our theoretical predictions. In both cases, the link's rectified output dc voltage varied by less than 16% over link distances that ranged from 2 to 10 mm.

An energy-efficient micropower neural recording amplifier.

This paper describes an ultralow-power neural recording amplifier. The amplifier appears to be the lowest power and most energy-efficient neural recording amplifier reported to date. We describe low-noise design techniques that help the neural amplifier achieve input-referred noise that is near the theoretical limit of any amplifier using a differential pair as an input stage. Since neural amplifiers must include differential input pairs in practice to allow robust rejection of common-mode and power supply noise, our design appears to be near the optimum allowed by theory. The bandwidth of the amplifier can be adjusted for recording either neural spikes or local field potentials (LFPs). When configured for recording neural spikes, the amplifier yielded a midband gain of 40.8 dB and a -3-dB bandwidth from 45 Hz to 5.32 kHz; the amplifier's input-referred noise was measured to be 3.06 muVrms while consuming 7.56 muW of power from a 2.8-V supply corresponding to a noise efficiency factor (NEF) of 2.67 with the theoretical limit being 2.02. When configured for recording LFPs, the amplifier achieved a midband gain of 40.9 dB and a -3-dB bandwidth from 392 mHz to 295 Hz; the input-referred noise was 1.66 muVrms while consuming 2.08 muW from a 2.8-V supply corresponding to an NEF of 3.21. The amplifier was fabricated in AMI's 0.5-mum CMOS process and occupies 0.16 mm(2) of chip area. We obtained successful recordings of action potentials from the robust nucleus of the arcopallium (RA) of an anesthesized zebra finch brain with the amplifier. Our experimental measurements of the amplifier's performance including its noise were in good accord with theory and circuit simulations.

A Low-Power Blocking-Capacitor-Free Charge-Balanced Electrode-Stimulator Chip With Less Than 6 nA DC Error for 1-mA Full-Scale Stimulation.

Large dc blocking capacitors are a bottleneck in reducing the size and cost of neural implants. We describe an electrode-stimulator chip that removes the need for large dc blocking capacitors in neural implants by achieving precise charge-balanced stimulation with <6 nA of dc error. For cochlear implant patients, this is well below the industry's safety limit of 25 nA. Charge balance is achieved by dynamic current balancing to reduce the mismatch between the positive and negative phases of current to 0.4%, followed by a shorting phase of at least 1 ms between current pulses to further reduce the charge error. On +6 and -9 V rails in a 0.7-mum AMI high voltage process, the power consumption of a single channel of this chip is 47 muW when biasing power is shared by 16 channels.

Digital selection and analogue amplification coexist in a cortex-inspired silicon circuit.

Digital circuits such as the flip-flop use feedback to achieve multistability and nonlinearity to restore signals to logical levels, for example 0 and 1. Analogue feedback circuits are generally designed to operate linearly, so that signals are over a range, and the response is unique. By contrast, the response of cortical circuits to sensory stimulation can be both multistable and graded. We propose that the neocortex combines digital selection of an active set of neurons with analogue response by dynamically varying the positive feedback inherent in its recurrent connections. Strong positive feedback causes differential instabilities that drive the selection of a set of active neurons under the constraints embedded in the synaptic weights. Once selected, the active neurons generate weaker, stable feedback that provides analogue amplification of the input. Here we present our model of cortical processing as an electronic circuit that emulates this hybrid operation, and so is able to perform computations that are similar to stimulus selection, gain modulation and spatiotemporal pattern generation in the neocortex.

Large-scale complementary integrated circuits based on organic transistors

Thin-film transistors based on molecular and polymeric organic materials have been proposed for a number of applications, such as displays and radio-frequency identification tags. The main factors motivating investigations of organic transistors are their lower cost and simpler packaging, relative to conventional inorganic electronics, and their compatibility with flexible substrates. In most digital circuitry, minimal power dissipation and stability of performance against transistor parameter variations are crucial. In silicon-based microelectronics, these are achieved through the use of complementary logic-which incorporates both p- and n-type transistors-and it is therefore reasonable to suppose that adoption of such an approach with organic semiconductors will similarly result in reduced power dissipation, improved noise margins and greater operational stability. Complementary inverters and ring oscillators have already been reported. Here we show that such an approach can realize much larger scales of integration (in the present case, up to 864 transistors per circuit) and operation speeds of approximately 1 kHz in clocked sequential complementary circuits.

Analog versus digital: extrapolating from electronics to neurobiology.

We review the pros and cons of analog and digital computation. We propose that computation that is most efficient in its use of resources is neither analog computation nor digital computation but, rather, a mixture of the two forms. For maximum efficiency, the information and information-processing resources of the hybrid form must be distributed over many wires, with an optimal signal-to-noise ratio per wire. Our results suggest that it is likely that the brain computes in a hybrid fashion and that an underappreciated and important reason for the efficiency of the human brain, which consumes only 12 W, is the hybrid and distributed nature of its architecture.