Raman mediated ultrafast all-optical NOR gate.

A new device architecture has been proposed in this paper implementing the all-optical cascadable logic NOR functionality. The device functions based on stimulated Raman scattering (SRS) in silicon nanocrystal embedded slotted photonic crystal waveguide (SPCW). Substantial miniaturizations both in operating power and overall footprint of the device have been achieved owing to the ultrahigh SRS gain of silicon nanocrystal and strong spatio-temporal confinement of the SPCW. Successful operation of the device has been demonstrated at a pulse rate that is as high as 125 Gbps.

An accurate inner diameter measurement.

The inaccurate deflection behavior of the probing system degrades the performance of the diameter-measuring machines. In this experiment, the probing is improved, applying an autocollimator and an angular positioning datum. We have devised this datum using a liquid wedge. A ring gauge is chosen as a workpiece to evaluate the deflection behavior of the probing system. The improved uncertainty of the probing is found as low as 40 nm. Subsequently, the inner diameter of the ring gauge is measured on this experimental setup. By employing a simulation, we aligned the workpiece. The deflections of the stylus are optimized to achieve zero deflection error at the zenith points. Consequently, the swing of the probe at the zenith points is combined with the rectilinear displacement of the workpiece to estimate the inner diameter. The uncertainty of the measurement of the ring gauge is improved up to 140 nm.

High-speed all-optical logic inverter based on stimulated Raman scattering in silicon nanocrystal.

In this paper, we propose a new device architecture for an all-optical logic inverter (NOT gate), which is cascadable with a similar device. The inverter is based on stimulated Raman scattering in silicon nanocrystal waveguides, which are embedded in a silicon photonic crystal structure. The Raman response function of silicon nanocrystal is evaluated to explore the transfer characteristic of the inverter. A maximum product criterion for the noise margin is taken to analyze the cascadability of the inverter. The time domain response of the inverter, which explores successful inversion operation at 100 Gb/s, is analyzed. Propagation delay of the inverter is on the order of 5 ps, which is less than the delay in most of the electronic logic families as of today. Overall dimension of the device is around 755 µm ×15 µm, which ensures integration compatibility with the matured silicon industry.

Raman mediated all-optical cascadable inverter using silicon-on-insulator waveguides.

In this Letter, we propose an all-optical circuit for a cascadable and integrable logic inverter based on stimulated Raman scattering. A maximum product criteria for noise margin is taken to analyze the cascadability of the inverter. Variation of noise margin for different model parameters is also studied. Finally, the time domain response of the inverter is analyzed for different widths of input pulses.