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1.
Nanomaterials (Basel) ; 12(14)2022 Jul 18.
Article in English | MEDLINE | ID: mdl-35889681

ABSTRACT

As a strong candidate for computing in memory, 3D NAND flash memory has attracted great attention due to the high computing efficiency, which outperforms the conventional von-Neumann architecture. To ensure 3D NAND flash memory is truly integrated in the computing in a memory chip, a new candidate with high density and a large on/off current ratio is now urgently needed. Here, we first report that 3D NAND flash memory with a high density of multilevel storage can be realized in a double-layered Si quantum dot floating-gate MOS structure. The largest capacitance-voltage (C-V) memory window of 6.6 V is twice as much as that of the device with single-layer nc-Si quantum dots. Furthermore, the stable memory window of 5.5 V can be kept after the retention time of 105 s. The obvious conductance-voltage (G-V) peaks related to the charging process can be observed, which further confirms that the multilevel storage can be realized in double-layer Si quantum dots. Moreover, the on/off ratio of 3D NAND flash memory with a nc-Si floating gate can reach 104, displaying the characteristic of a depletion working mode of an N-type channel. The memory window of 3 V can be maintained after 105 P/E cycles. The programming and erasing speed can arrive at 100 µs under the bias of +7 V and -7 V. Our introduction of double-layer Si quantum dots in 3D NAND float gating memory supplies a new way to the realization of computing in memory.

2.
J Phys Chem Lett ; 11(19): 8451-8458, 2020 Oct 01.
Article in English | MEDLINE | ID: mdl-32914985

ABSTRACT

With the coming of the big data age, the resistive switching memory (RSM) of three-dimensional (3D) high density shows a significant application in information storage and processing due to its simple structure and size-scalable characteristic. However, an electrical initialization process makes the peripheral circuits of 3D integration too complicated to be realized. Here a new forming-free SiCx:H-based device can be obtained by tuning the Si dangling bond conductive channel. It is discovered that the forming-free behavior can be ascribed to the Si dangling bonds in the as-deposited SiCx:H films. By tuning the number of Si dangling bonds, the forming-free SiCx:H RSM exhibits a tunable memory window. The fracture and connection of the Si dangling bond conduction pathway induces the switching from the high-resistance state (HRS) to the low-resistance state (LRS). Our discovery of forming-free SiCx:H resistive switching memory with tunable pathway opens a way to the realization of 3D high-density memory.

3.
Nanotechnology ; 30(36): 365701, 2019 Sep 06.
Article in English | MEDLINE | ID: mdl-31137019

ABSTRACT

The unique forming-free feature of Si-based resistive switching memory plays a key role in the industrialization of next generation memory in the nanoscale. Here we report on a new forming-free nanocrystalline-Si:H (nc-Si:H)/SiNx:H resistive switching memory that can be obtained by deposition of hydrogen diluted nc-Si on hydrogen plasma treated a-SiNx:H layer. It is found that nc-Si dots with areal density of 5.6 × 1012/cm2 exist in nc-Si:H sublayer. Si dangling bonds (DBs) of volume density of 4.13 × 1023 cm-3 are produced in the a-SiNx:H sublayer. Temperature dependent current characteristic and theoretical calculations further reveal that hybrid channel of nc-Si and Si dangling bonds are the origin of the forming-free performance of nc-Si:H/SiNx:H resistive switching memory, which obey the trap assisted tunneling model at the low resistance state and P-F model at the high resistance state. Our discovery of hybrid channel supplies a new way to make Si-based RRAM be used in high density memory in the future.

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