Retention Secured Nonlinear and Self-Rectifying Analog Charge Trap Memristor for Energy-Efficient Neuromorphic Hardware.

A memristive crossbar array (MCA) is an ideal platform for emerging memory and neuromorphic hardware due to its high bitwise density capability. A charge trap memristor (CTM) is an attractive candidate for the memristor cell of the MCA, because the embodied rectifying characteristic frees it from the sneak current issue. Although the potential of the CTM devices has been suggested, their practical viability needs to be further proved. Here, a Pt/Ta2 O5 /Nb2 O5- x /Al2 O3- y /Ti CTM stack exhibiting high retention and array-level uniformity is proposed, allowing a highly reliable selector-less MCA. It shows high self-rectifying and nonlinear current-voltage characteristics below 1 µA of programming current with a continuous analog switching behavior. Also, its retention is longer than 105 s at 150 °C, suggesting the device is highly stable for non-volatile analog applications. A plausible band diagram model is proposed based on the electronic spectroscopy results and conduction mechanism analysis. The self-rectifying and nonlinear characteristics allow reducing the on-chip training energy consumption by 71% for the MNIST dataset training task with an optimized programming scheme.

Ternary Logic with Stateful Neural Networks Using a Bilayered TaOX -Based Memristor Exhibiting Ternary States.

A memristive stateful neural network allowing complete Boolean in-memory computing attracts high interest in future electronics. Various Boolean logic gates and functions demonstrated so far confirm their practical potential as an emerging computing device. However, spatio-temporal efficiency of the stateful logic is still too limited to replace conventional computing technologies. This study proposes a ternary-state memristor device (simply a ternary memristor) for application to ternary stateful logic. The ternary-state implementable memristor device is developed with bilayered tantalum oxide by precisely controlling the oxygen content in each oxide layer. The device can operate 157 ternary logic gates in one operational clock, which allows an experimental demonstration of a functionally complete three-valued Lukasiewicz logic system. An optimized logic cascading strategy with possible ternary gates is ≈20% more efficient than conventional binary stateful logic, suggesting it can be beneficial for higher performance in-memory computing.