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1.
Sci Rep ; 10(1): 16664, 2020 10 07.
Article in English | MEDLINE | ID: mdl-33028862

ABSTRACT

The rapid evolution of the neuromorphic computing stimulates the search for novel brain-inspired electronic devices. Synaptic transistors are three-terminal devices that can mimic the chemical synapses while consuming low power, whereby an insulating dielectric layer physically separates output and input signals from each other. Appropriate choice of the dielectric is crucial in achieving a wide range of operation frequencies in these devices. Here we report synaptic transistors with printed aluminum oxide dielectrics, improving the operation frequency of solution-processed synaptic transistors by almost two orders of magnitude to 50 kHz. Fabricated devices, yielding synaptic response for all audio frequencies (20 Hz to 20 kHz), are employed in an acoustic response system to show the potential for future research in neuro-acoustic signal processing with printed oxide electronics.


Subject(s)
Biomimetic Materials , Signal Processing, Computer-Assisted , Synapses/physiology , Transistors, Electronic , Aluminum Oxide , Biomimetics , Electronics
2.
ACS Nano ; 9(5): 5255-63, 2015 May 26.
Article in English | MEDLINE | ID: mdl-25933370

ABSTRACT

The ability to incorporate rigid but high-performance nanoscale nonplanar complementary metal-oxide semiconductor (CMOS) electronics with curvilinear, irregular, or asymmetric shapes and surfaces is an arduous but timely challenge in enabling the production of wearable electronics with an in situ information-processing ability in the digital world. Therefore, we are demonstrating a soft-material enabled double-transfer-based process to integrate flexible, silicon-based, nanoscale, nonplanar, fin-shaped field effect transistors (FinFETs) and planar metal-oxide-semiconductor field effect transistors (MOSFETs) on various asymmetric surfaces to study their compatibility and enhanced applicability in various emerging fields. FinFET devices feature sub-20 nm dimensions and state-of-the-art, high-κ/metal gate stacks, showing no performance alteration after the transfer process. A further analysis of the transferred MOSFET devices, featuring 1 µm gate length, exhibits an ION value of nearly 70 µA/µm (VDS = 2 V, VGS = 2 V) and a low subthreshold swing of around 90 mV/dec, proving that a soft interfacial material can act both as a strong adhesion/interposing layer between devices and final substrate as well as a means to reduce strain, which ultimately helps maintain the device's performance with insignificant deterioration even at a high bending state.

3.
Adv Healthc Mater ; 4(5): 665-73, 2015 Apr 02.
Article in English | MEDLINE | ID: mdl-25471473

ABSTRACT

Unprecedented 800% stretchable, non-polymeric, widely used, low-cost, naturally rigid, metallic thin-film copper (Cu)-based flexible and non-invasive, spatially tunable, mobile thermal patch with wireless controllability, adaptability (tunes the amount of heat based on the temperature of the swollen portion), reusability, and affordability due to low-cost complementary metal oxide semiconductor (CMOS) compatible integration.


Subject(s)
Copper/chemistry , Hyperthermia, Induced/instrumentation , Smartphone/instrumentation , Adult , Equipment Design , Forearm/physiology , Humans , Temperature
4.
ACS Nano ; 8(10): 9850-6, 2014 Oct 28.
Article in English | MEDLINE | ID: mdl-25185112

ABSTRACT

With the emergence of the Internet of Things (IoT), flexible high-performance nanoscale electronics are more desired. At the moment, FinFET is the most advanced transistor architecture used in the state-of-the-art microprocessors. Therefore, we show a soft-etch based substrate thinning process to transform silicon-on-insulator (SOI) based nanoscale FinFET into flexible FinFET and then conduct comprehensive electrical characterization under various bending conditions to understand its electrical performance. Our study shows that back-etch based substrate thinning process is gentler than traditional abrasive back-grinding process; it can attain ultraflexibility and the electrical characteristics of the flexible nanoscale FinFET show no performance degradation compared to its rigid bulk counterpart indicating its readiness to be used for flexible high-performance electronics.

5.
ACS Nano ; 8(2): 1468-74, 2014 Feb 25.
Article in English | MEDLINE | ID: mdl-24476361

ABSTRACT

In today's traditional electronics such as in computers or in mobile phones, billions of high-performance, ultra-low-power devices are neatly integrated in extremely compact areas on rigid and brittle but low-cost bulk monocrystalline silicon (100) wafers. Ninety percent of global electronics are made up of silicon. Therefore, we have developed a generic low-cost regenerative batch fabrication process to transform such wafers full of devices into thin (5 µm), mechanically flexible, optically semitransparent silicon fabric with devices, then recycling the remaining wafer to generate multiple silicon fabric with chips and devices, ensuring low-cost and optimal utilization of the whole substrate. We show monocrystalline, amorphous, and polycrystalline silicon and silicon dioxide fabric, all from low-cost bulk silicon (100) wafers with the semiconductor industry's most advanced high-κ/metal gate stack based high-performance, ultra-low-power capacitors, field effect transistors, energy harvesters, and storage to emphasize the effectiveness and versatility of this process to transform traditional electronics into flexible and semitransparent ones for multipurpose applications.

6.
Sci Rep ; 3: 2609, 2013.
Article in English | MEDLINE | ID: mdl-24018904

ABSTRACT

State-of-the art computers need high performance transistors, which consume ultra-low power resulting in longer battery lifetime. Billions of transistors are integrated neatly using matured silicon fabrication process to maintain the performance per cost advantage. In that context, low-cost mono-crystalline bulk silicon (100) based high performance transistors are considered as the heart of today's computers. One limitation is silicon's rigidity and brittleness. Here we show a generic batch process to convert high performance silicon electronics into flexible and semi-transparent one while retaining its performance, process compatibility, integration density and cost. We demonstrate high-k/metal gate stack based p-type metal oxide semiconductor field effect transistors on 4 inch silicon fabric released from bulk silicon (100) wafers with sub-threshold swing of 80 mV dec(-1) and on/off ratio of near 10(4) within 10% device uniformity with a minimum bending radius of 5 mm and an average transmittance of ~7% in the visible spectrum.

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