Differentiating morphea from lichen Sclerosus by using multiphoton microscopy combined with U-Net model for elastic fiber segmentation.

This paper describes a methodology to differentiate morphea from lichen sclerosus based on examination with multiphoton microscopy (MPM) composed of two-photon excited fluorescence (TPEF) and second harmonic generation (SHG). Subcellular-resolution images were acquired by MPM from unstained lesion tissues then process spectral analysis to quantify the TPEF and SHG signals. Moreover, U-Net was employed to segment elastic fiber in TPEF images to combine with collagen fiber in SHG images for precise fiber quantification. Predictions of segmentation showed excellent performance on several evaluation indicators. The mIoU, mPA, and F1 score reach 0.8516, 0.9281, and 0.941. The quantitative analysis demonstrated the increase of collagen fibers in morphea compared to that in lichen sclerosus cases. Meanwhile, the great diminution of elastic fiber in the dermis of lichen sclerosus was depicted based on MPM imaging. Thus, MPM was comparable to the histopathological examination and our experimental results accurately distinguish between morphea and lichen sclerosus.

The Optimization of Spacer Engineering for Capacitor-Less DRAM Based on the Dual-Gate Tunneling Transistor.

The DRAM based on the dual-gate tunneling FET (DGTFET) has the advantages of capacitor-less structure and high retention time. In this paper, the optimization of spacer engineering for DGTFET DRAM is systematically investigated by Silvaco-Atlas tool to further improve its performance, including the reduction of reading "0" current and extension of retention time. The simulation results show that spacers at the source and drain sides should apply the low-k and high-k dielectrics, respectively, which can enhance the reading "1" current and reduce reading "0" current. Applying this optimized spacer engineering, the DGTFET DRAM obtains the optimum performance-extremely low reading "0" current (10-14A/µm) and large retention time (10s), which decreases its static power consumption and dynamic refresh rate. And the low reading "0" current also enhances its current ratio (107) of reading "1" to reading "0". Furthermore, the analysis about scalability reveals its inherent shortcoming, which offers the further investigation direction for DGTFET DRAM.

The Programming Optimization of Capacitorless 1T DRAM Based on the Dual-Gate TFET.

The larger volume of capacitor and higher leakage current of transistor have become the inherent disadvantages for the traditional one transistor (1T)-one capacitor (1C) dynamic random access memory (DRAM). Recently, the tunneling FET (TFET) is applied in DRAM cell due to the low off-state current and high switching ratio. The dual-gate TFET (DG-TFET) DRAM cell with the capacitorless structure has the superior performance-higher retention time (RT) and weak temperature dependence. But the performance of TFET DRAM cell is sensitive to programming condition. In this paper, the guideline of programming optimization is discussed in detail by using simulation tool-Silvaco Atlas. Both the writing and reading operations of DG-TFET DRAM depend on the band-to-band tunneling (BTBT). During the writing operation, the holes coming from BTBT governed by Gate2 are stored in potential well under Gate2. A small negative voltage is applied at Gate2 to retain holes for a long time during holding "1". The BTBT governed by Gate1 mainly influences the reading current. Using the optimized programming condition, the DG-TFET DRAM obtains the higher current ratio of reading "1" to reading "0" (107) and RT of more than 2 s. The higher RT reduces the refresh rate and dynamic power consumption of DRAM.