ABSTRACT
Tunneling Field-Effect Transistors (TFET) are one of the most promising candidates for future low-power CMOS applications including mobile and Internet of Things (IoT) products. A vertical gate-all-around (VGAA) architecture with a core shell (C-S) structure is the leading contender to meet CMOS footprint requirements while simultaneously delivering high current drive for high performance specifications and subthreshold swing below the Boltzmann limit for low power operation. In this work, VGAA nanowire GaSb/InAs C-S TFETs are demonstrated experimentally for the first time with key device properties of subthreshold swing S = 40 mV/dec (Vd = 10 mV) and current drive up to 40 µA/wire (Vd = 0.3 V, diameter d = 50 nm) while dimensions including core diameter d, shell thickness and gate length are scaled towards CMOS requirements. The experimental data in conjunction with TCAD modeling reveal interface trap density requirements to reach industry standard off-current specifications.
ABSTRACT
The modified phonon dispersion is of importance for understanding the origin of the reduced heat conductivity in nanowires. We have measured the phonon dispersion for 50 nm diameter InSb (111) nanowires using time-resolved X-ray diffraction. By comparing the sound speed of the bulk (3880 m/s) and that of a classical thin rod (3600 m/s) to our measurement (2880 m/s), we conclude that the origin of the reduced sound speed and thereby to the reduced heat conductivity is that the C44 elastic constant is reduced by 35% compared to the bulk material.
ABSTRACT
We report on measurements of the light absorption efficiency of InSb nanowires. The absorbed 70 fs light pulse generates carriers, which equilibrate with the lattice via electron-phonon coupling. The increase in lattice temperature is manifested as a strain that can be measured with X-ray diffraction. The diffracted X-ray signal from the excited sample was measured using a streak camera. The amount of absorbed light was deduced by comparing X-ray diffraction measurements with simulations. It was found that 3.0(6)% of the radiation incident on the sample was absorbed by the nanowires, which cover 2.5% of the sample.
ABSTRACT
The large, level-dependent g factors in an InSb nanowire quantum dot allow for the occurrence of a variety of level crossings in the dot. While we observe the standard conductance enhancement in the Coulomb blockade region for aligned levels with different spins due to the Kondo effect, a vanishing of the conductance is found at the alignment of levels with equal spins. This conductance suppression appears as a canyon cutting through the web of direct tunneling lines and an enclosed Coulomb blockade region. In the center of the Coulomb blockade region, we observe the predicted correlation-induced resonance. Our findings are supported by numerical and analytical calculations.
ABSTRACT
In this letter we report on high-frequency measurements on vertically standing III-V nanowire wrap-gate MOSFETs (metal-oxide-semiconductor field-effect transistors). The nanowire transistors are fabricated from InAs nanowires that are epitaxially grown on a semi-insulating InP substrate. All three terminals of the MOSFETs are defined by wrap around contacts. This makes it possible to perform high-frequency measurements on the vertical InAs MOSFETs. We present S-parameter measurements performed on a matrix consisting of 70 InAs nanowire MOSFETs, which have a gate length of about 100 nm. The highest unity current gain cutoff frequency, f(t), extracted from these measurements is 7.4 GHz and the maximum frequency of oscillation, f(max), is higher than 20 GHz. This demonstrates that this is a viable technique for fabricating high-frequency integrated circuits consisting of vertical nanowires.
Subject(s)
Arsenicals/chemistry , Indium/chemistry , Nanostructures/chemistry , Nanotechnology/instrumentation , Transistors, Electronic , Equipment Design , Equipment Failure Analysis , Materials Testing , Microwaves , Nanostructures/ultrastructure , Particle SizeABSTRACT
The capacitance of arrays of vertical wrapped-gate InAs nanowires is analysed. With the help of a Poisson-Schrödinger solver, information about the doping density can be obtained directly. Further features in the measured capacitance-voltage characteristics can be attributed to the presence of surface states as well as the coexistence of electrons and holes in the wire. For both scenarios, quantitative estimates are provided. It is furthermore shown that the difference between the actual capacitance and the geometrical limit is quite large, and depends strongly on the nanowire material.